Obtaining of UART clocks

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Obtaining of UART clocks

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mirogliopaolo
Contributor II

I'm writing linux kernel module for uart control of i.mx6d, i'm taking as example the imx.c and mxc_uart_early.c sources in ./drivers/tty/serial.

/* Enable Early MXC UART Clock */

clk_enable(device->clk);

port->uartclk = 5600000;

for example in imx.c source main clock is got from:

clk_get(&pdev->udev, "uart");

...

sport->port.uartclk = clk_get_rate(sport->clk);

I'm trying to figure out how it works in order to configure divisors and so on, also if i check on mxc_uart_early code is as follows:

/* Enable Early MXC UART Clock */

clk_enable(device->clk);

port->uartclk = 5600000;

I don't wanna use platform and uart struct but access directly registers, could you kindly suggest the steps to proceed or if there is some part to read to get it clear?

Best Regards

Miroglio Paolo

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fabio_estevam
NXP Employee
NXP Employee

Why can't you use the existing imx serial driver and need to create your own version of it?

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mirogliopaolo
Contributor II

Because it is a porting for a kernel module that was made for x86 embedded systems, it is like a "gateway" between udp network, rs485 network and canbus network.

The user space client just need to ask data in a "dumb" way, kernel module takes care when it should be sent by serial or by other protocol.

Best Regards

Miroglio Paolo

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YixingKong
Senior Contributor IV

Paolo

This discussion is closed since no activity. If you still need help, please feel free to reply with an update to this discussion, or create another discussion.

Thanks,

Yixing

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YixingKong
Senior Contributor IV

Paolo

Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.

Thanks,
Yixing

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AnsonHuang
NXP Employee
NXP Employee

Hi, Paolo

     Not sure whether I understand you correctly, you meant you want to access register directly to configurate uart's clock? If so, then you can configurate CCM_CSCDR1 bit[0-5] for UART's clock, its parent is PLL3 divided by 6, which is 80MHz. So, you can divide it from 80MHz to the freq you want. To enable PLL3, you can refer to clock driver of our BSP. And you also need to make sure UART clock is not gated, the clock gate of UART is in CCM_CCGR5. All these info you can get from our reference manual.

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mirogliopaolo
Contributor II

Dear Huang,

thanks for you support.

I'm aware of how the hardware is working i read the manual regarding prescalers, module clock, etc, but i need to know how and where linux is doing so to configure serial ports (it will surely do this).

I need the prescaler values so when someone set baudrate to 115200 as param the module knows about the time quanta tQ, prescalers to set to get the correct baudrate.

I'm wondering where and how kernel is computing so i can use the same way to set the baudrate!

Best Regards

Miroglio Paolo

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