In the i.MX7 Dual reference manual there is a note under chapter 9.3.1.1 that states "ODT is not supported for LPDDR3". Is this correct and does this really mean that ODT is not used for this memory type? There is a reason why ODT was added when specifying DDR3 so I would like to know if anyone has any experience with signal integrity and noise using LPDDR3 with the i.MX7 processor?
Hello,
“Like LPDDR2 devices, LPDDR3 devices reduce layout constraints by eliminating the
need for discrete termination to VTT and the need for VTT generation for the data bus.
Unlike LPDDR2 devices, however, LPDDR3 devices support on-die DQ termination
(ODT), a feature that enables the device to enable and disable termination resistance
for the DQ bus during writes via the ODT control pin.”
IMX7 does not support ODT for LPDDR3. From one side this does not influence
on signal integrity configuration ; still no need for external termination. On the other
side - design is very close to LPDDR2.
Have a great day,
Yuri
------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer
button. Thank you!