No signal in MX53 LVDS pin -blog archive

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No signal in MX53 LVDS pin -blog archive

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shaojun_wang
NXP Employee
NXP Employee

  In MX53 datasheet, there is such description: “LVDS_BG_RES functions as reference of the LVDS bandgap circuit. Connect 28 kΩ 1% to GND in case the external resistor option is chosen, otherwise this signal can remain floating.”

  In MX53 SMD schematic, LVDS_BG_RES is connected to an external resistor, so bit bgref_rrmode of LDB_CTRL register should be set to 0. This is the default setting of MX53 SMD Kernel/Uboot LDB code.

  In some customer board, LVDS_BG_RES is floating. To enable LVDS, bit bgref_rrmode of LDB_CTRL register should be set to 1.

  So if you find there is no signal in your LVDS pin, please check LVDS_BG_RES and bgref_rrmode of LDB_CTRL register.

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