No pwmchip for sysfs imx6

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No pwmchip for sysfs imx6

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Contributor II

Hello,

I am uncertain what might be missing from my device tree or kernel configuration, if anything, that might be preventing my linux image (Yocto Zeus - kernel 5.4.3) from including the /sys/class/pwm/pwmchipx files. The software developer that originally setup our device tree intended for iomux on the GPIO pins to allow for an alternate mode of PWM. If I comment out the GPIO line and uncomment the PWM line, I do lose the GPIO pin but it does not make PWMchip available so no PWM. PWM also does not show up under /proc/device-tree

Kernel config options I have in place currently that I believe would be related:

CONFIG_SYSFS=y

CONFIG_PWM_SYSFS=y

CONFIG_PWM=y

CONFIG_PWM_IMX=y

Relevant sections of .dtsi files:

&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx6qdl-tetra {
pinctrl_hog: hoggrp {
fsl,pins = <
/* Programmable LED output for User I/O */
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x0001B018
/* Updated for TP, pull-down, 90 Ohm, slow slew */
MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x00013098
/* Updated for TP */
MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x00013098
/* Updated for TP */
MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x00013098
/* COMP_IRQ# input, update to pull-up (off by default)*/
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x0001B0B0
/* PMIC_INT# input (pull-up = off by default) */
MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x0001B0B0
/* USB_HUB_RST# out (pull-up = off by default) */
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x0001B030
/* SOC_RSTOUT# out (pull-up = off by default) */
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x0001B030
/* LVDS signals */
/* GPIO6_IO16 is LVDS_PANEL_PWREN, was 0x80000000 */
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x00013018
/* GPIO6_IO07 is PG_V3P3_LVDS input, was 0x80000000 */
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x0001B018
/* section for multifunction pins. Choose one function for each pin
/* PIN1: GPIO1/GPT_OUT1/PWM_OUT4 */
/* MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x0001B018 */  /* GPIO 1 */
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x0001B018  /* PWM_OUT4 */
/* MX6QDL_PAD_SD1_CMD__GPT_COMPARE1 0x0001B018 */ /* GPT_OUT1 */
/* PIN2: GPIO2/GPT_IN1 */
MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x0001B018 /* GPIO 2 */
/* MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1 0x0001B018 */ /* GPT_IN1 */
/* PIN3: GPIO3/GPT_IN2/PWM_OUT3 */
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x0001B018 /* GPIO 3 */
/* MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x0001B018 */ /* PWM_OUT3 */
/* MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2 0x0001B018 */ /* GPT_IN2 */
/* PIN4: GPIO4/GPT_OUT2/WDOG1_RST# */
MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x0001B018 /* GPIO 4 */
/* MX6QDL_PAD_SD1_DAT2__GPT_COMPARE2 0x0001B018 */ /* GPT_OUT2 */
/* MX6QDL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB 0x0001B018 */ /* WDOG1_RST# */
/* PIN5: GPIO5/GPT_CLKIN */
MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x0001B018 /* GPIO 5 */
/* MX6QDL_PAD_SD1_CLK__GPT_CLKIN 0x0001B018 */ /* GPT_CLKIN */
/* PIN6: GPIO 6 */
MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x0001B018 /* GPIO 6 */
/* PIN7: GPIO7/PWM_OUT2/WDOG2# */
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x0001B018 /* GPIO 7 */
/* MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x0001B018 */ /*PWM_OUT2 */
/* MX6QDL_PAD_DISP0_DAT9__WDOG2_B 0x0001B018 */ /*WDOG2# */
/* PIN8: GPIO 8 */
MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x0001B018 /* GPIO 8 */
/* GP_IRQ#, set as open drain (might have mult. drivers) */
MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x0001B818
>;
};

.

.

.

pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x0001B018
>;
};

.

.

&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
status = "okay";
};

((sorry spacing got messed up above))

Please let me know if I am missing anything above or if there are other ideas of what I should look into.

Thanks!

Nathan

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3 Replies

22 Views
Contributor II

The solution was found in imx6qdl.dtsi which had the configuration settings including "disabled" or "okay". For example:

pwm3: pwm@2088000 {
#pwm-cells = <2>;
compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
reg = <0x02088000 0x4000>;
interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_IPG>,
<&clks IMX6QDL_CLK_PWM3>;
clock-names = "ipg", "per";
status = "disabled"; //Set to "okay" to enable PWM3

Cheers,

Nathan

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NXP TechSupport
NXP TechSupport

Hi Nathan

one can look at pwm usage in linux at PWM (Linux) 

what processor and bsp used in the case.

Below pwm4 dts example sabrelite board

linux-imx6/imx6qdl-sabrelite.dtsi at boundary-imx_5.4.x_2.1.0 · boundarydevices/linux-imx6 · GitHub 

Best regards
igor
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Contributor II

Hello Igor, 

Thank you for your response. 

Processor is the i.mx6 and our bsp is based on the sabrelite I believe. 

It also appears that when I boot my board that the Embedded Linux may not be probing for the PWM pins. That should take place with the CONFIG_SYSFS yes?

-Nathan

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