No output signal on PCIe TX Pins after SoftReset

[moritzjulen]

Hi

Occasional the PCIe Link is not coming up after a SoftReset (Watchdog is generating a System Reset SRS=0).

Measurements made on PCIe Reset, Clock, RX and TX indicated that there is no output signal on the TX Pins on the i.MX6DL after releasing the Reset. POR doesn’t show this erroneous behavior.

After adding an initialization of some REF_SSP_EN in GPR1 of the IOMUXC this phenomena disappeared.

Questions:

- does a technical note exist which describes how to initialize PCIe properly?

- are there any known bugs?

Best regards

Moritz

[moritzjulen]

Hi Igor

Thanks a lot for your fast respone.

Do you know what this ref_ssp_en bit does?

Best regards

Moritz

[igorpadykov]

Hi Moritz

it is described in sect.36.4.2 GPR (IOMUXC_GPR1) i.MX6DQ Reference Manual

PCIe_PHY - Reference Clock Enable for SS function. Function: Enables the reference clock to the
prescaler. The phy_ref_ssp_en signal must remain deasserted until the reference clock is running at the
appropriate frequency, at which point phy_ref_ssp_en can be asserted. For lower power states,
phy_ref_ssp_en can also be deasserted.

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf

Best regards
igor

[moritzjulen]

Hi Igor

Yes I read this before. But this doesn't help me so much.

Does it mean, that the reference clock for PCIe must be disabled manually an reenabled during the boot sequence to guarantee the function? Are there other peripherals with such requirements?

Thanks for your help

Moritz

[igorpadykov]

Hi Moritz

yes as description stated

"..The phy_ref_ssp_en signal must remain deasserted until the reference clock is running at the
appropriate frequency.."

Best regards
igor

[igorpadykov]

Hi Moritz

 it is necessary to clear ref_ssp_en( bit16 of gpr1 ) before board reset,
as this bit is not automatically cleared when chip warm reset happens.

Regarding documentation one can look at AN4784 PCIe Certification Guide

http://cache.freescale.com/files/32bit/doc/app_note/AN4784.pdf 

i.MX6SDL Errata

http://cache.freescale.com/files/32bit/doc/errata/IMX6SDLCE.pdf

I am not aware of additional technical notes describing how to initialize PCIe properly,

one can look nxp bsp sources on

i.MX 6 Series Software and Development Tool|NXP 

Best regards
igor
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