New camera ISP bring up for IMX8MP

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New camera ISP bring up for IMX8MP

1,031 Views
inbogus78
Contributor II

Dear NXP.

We need help for Camera Bring up.

We use PI6008K (ISP), PK5210N(CMOS). But do not work camera preview.

We attached files.(Datasheet, dts and mipi csi clk waveform).

we not received frame  sync and rx interrupt , guess Dphy does not working

1. frame format is YUV422 8bit 

2. 

          data-lanes = <4>;

          csis-hs-settle = <13>;

          csis-clk-settle = <2>;

 

3. Master send mipi clock is 148M

 

We log :

 mxc-mipi-csi2.0: Frame End events: 0

 mxc-mipi-csi2.0: Frame Start events: 0

 mxc-mipi-csi2.0: Non-image data after odd frame events: 0

 mxc-mipi-csi2.0: Non-image data before odd frame events: 0

 mxc-mipi-csi2.0: Non-image data after even frame events: 0

 mxc-mipi-csi2.0: Non-image data before even frame events: 0

 mxc-mipi-csi2.0: Unknown Error events: 0

 mxc-mipi-csi2.0: CRC Error events: 0

 mxc-mipi-csi2.0: ECC Error events: 0

 mxc-mipi-csi2.0: FIFO Overflow Error events: 0

 mxc-mipi-csi2.0: Lost Frame End Error events: 0

 mxc-mipi-csi2.0: Lost Frame Start Error events: 0

 mxc-mipi-csi2.0: SOT Error events: 0

-------------------------------------

 mipi_csis_s_stream: 1, state: 0x0

 mipi_csis_sw_reset (676)

 mipi_csis_set_params (771)

 fmt: 0x2006, 640 x 360

 mipi_csis_set_hsync_settle (760)

 mipi_csis_system_enable (702)

 mipi_csis_enable_interrupts (661)

 --- mipi_csis_s_stream ---

         CSIS_VERSION[0]: 0x03060301

        CSIS_CMN_CTRL[4]: 0x00004b05

        CSIS_CLK_CTRL[8]: 0x000f0000

          CSIS_INTMSK[10]: 0x0fffff1f

          CSIS_INTSRC[14]: 0x00000000

      CSIS_DPHYSTATUS[20]: 0x00000001

        CSIS_DPHYCTRL[24]: 0x0d80001f

     CSIS_DPHYBCTRL_L[30]: 0x000001f4

     CSIS_DPHYBCTRL_H[34]: 0x00000000

     CSIS_DPHYSCTRL_L[38]: 0x00000000

     CSIS_DPHYSCTRL_H[3c]: 0x00000000

   CSIS_ISPCONFIG_CH0[40]: 0x00001078

   CSIS_ISPCONFIG_CH1[50]: 0x000008fd

   CSIS_ISPCONFIG_CH2[60]: 0x000008fe

   CSIS_ISPCONFIG_CH3[70]: 0x000008ff

    CSIS_ISPRESOL_CH0[44]: 0x01680280

    CSIS_ISPRESOL_CH1[54]: 0x80008000

    CSIS_ISPRESOL_CH2[64]: 0x80008000

    CSIS_ISPRESOL_CH3[74]: 0x80008000

     CSIS_ISPSYNC_CH0[48]: 0x00000000

     CSIS_ISPSYNC_CH1[58]: 0x00000000

     CSIS_ISPSYNC_CH2[68]: 0x00000000

     CSIS_ISPSYNC_CH3[78]: 0x00000000

 --- mipi_csis_s_stream ---

    GPR_GASKET_0_CTRL[60]: 0xffffffc0

   GPR_GASKET_0_HSIZE[64]: 0xffffffc0

   GPR_GASKET_0_VSIZE[68]: 0xffffffc0

 

MIPI clk output of PI6008K (ISP) is continuous mode like below picture.

 

12v q103000558.jpg

Please give us solution.

 

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979 Views
inbogus78
Contributor II

ISP MIPI CLOCK is only continuous mode. So ,Do not test non-continuous mode.

Let me know the AP setting for continuous mode.

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1,027 Views
inbogus78
Contributor II

Attached dts file.

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984 Views
jimmychan
NXP TechSupport
NXP TechSupport
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975 Views
inbogus78
Contributor II

ISP MIPI CLOCK is only continuous mode. So ,Do not test non-continuous mode.

Let me know the AP setting for continuous mode.

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969 Views
jimmychan
NXP TechSupport
NXP TechSupport

Please refer to the https://www.nxp.com.cn/docs/en/application-note/AN13573.pdf section 2.5 about the mode transitions.

in continuous clock mode, there may only be one LP state at the very beginning, and clock lane will always work in HS mode later. So it's better to make sensor work in LP state before enable 8MP DPHY. otherwise, DPHY may not detect the HS mode, then it can't receive data from sensor.

 

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