Hello,
If I configure DISP_B2_01 as GPIO5_02 the level is correct on the lane !
That means the issue come from the SAI configuration.
There is this diagram in the SAI documentation.

TX_DATA2 is used for sai_rxdata2 if "obe" is 0 but there is no information about this "obe". My thought was that it is configured by register TCR4 on bits TCE "Transmit Channel Enable"
And as I posted TCR4 is 0x10010f3b so TCE is 0x1 (TX0 enable, other are disabled)
Any information about that ?