Hello,
I'm trying to run the DDR Tool v3.10 on our custom board, based on the i.MX8MMini. The test only prints: "Please re-download with the correct value". I copy the full output below.
Could you let me know what this mean exactly? I have double-checked the values in the Excel spreadsheet and I believe it matches our board (which is almost identical to the EVK).
Thanks,
JP
Downloading file 'bin\lpddr4_train1d_string.bin' ..Done
Downloading file 'bin\lpddr4_train2d_string.bin' ..Done
Downloading file 'bin\lpddr4_pmu_train_1d_imem.bin' ..Done
Downloading file 'bin\lpddr4_pmu_train_1d_dmem.bin' ..Done
Downloading file 'bin\lpddr4_pmu_train_2d_imem.bin' ..Done
Downloading file 'bin\lpddr4_pmu_train_2d_dmem.bin' ..Done
Downloading IVT header...Done
Downloading file 'bin\m845s_ddr_stress_test.bin' ...Done
Download is complete
Waiting for the target board boot...
===================hardware_init=====================
********Found PMIC BD718XX**********
hardware_init exit
*************************************************************************
*************************************************************************
*************************************************************************
MX8 DDR Stress Test V3.10
Built on Feb 5 2020 13:04:09
*************************************************************************
--Set up the MMU and enable I and D cache--
- This is the Cortex-A53 core
- Check if I cache is enabled
- Enabling I cache since it was disabled
- Push base address of TTB to TTBR0_EL3
- Config TCR_EL3
- Config MAIR_EL3
- Enable MMU
- Data Cache has been enabled
- Check system memory register, only for debug
- VMCR Check:
- ttbr0_el3: 0x93d000
- tcr_el3: 0x2051c
- mair_el3: 0x774400
- sctlr_el3: 0xc01815
- id_aa64mmfr0_el1: 0x1122
- MMU and cache setup complete
*************************************************************************
ARM clock(CA53) rate: 1800MHz
DDR Clock: 1500MHz
============================================
DDR configuration
DDR type is LPDDR4
Data width: 32, bank num: 8
Row size: 15, col size: 10
One chip select is used
Number of DDR controllers used on the SoC: 1
Density per chip select: 1024MB
Density per controller is: 1024MB
Total density detected on the board is: 1024MB
============================================
Please re-download with the correct value
Hello,
We've tracked the problem down to an issue with the COM port. This fixed, the test runs and passes.
Many, many thanks for your help!
JP
Hi @vincentz63
Is there any problem with the COM port? Can you tell me how you fixed the problem?
”Please re-download with the correct value“
Because I have a similar problem.
Thanks
Hi,
No problem with the actual COM port. The problem was specific to our board and it was our mistake.
We have an optional RS-485 driver connected to the i.MX8MM's UART. We'd remove the driver chip for the board bring-up but forgot to also remove the biassing resistors from the transmittion lines.
JP
Thank you very much for your reply.
Hi jp_arnaud
one can recheck p.9 sect.4. "Load DDR initialization script and choose correct downloading options" MSCALE_DDR_Tool_User_Guide.pdf included in package
Best regards
igor
Hi,
The link you provided does not work...
I have followed the instructions very carefully. Using the same options in the GUI (MX8M-mini and LPDDR4), I can run the test on the LPDDR4-EVK, but I get this error with our own board.
Could you help me understand how far the test has gone by that point? Looking at the output, I think it has managed to run code on the i.MX. Is there any way to get more information about what causes this error message? Can we enable further logging from the test? Is it comparing what it reads from the LPDDR4 with what was described in the Excel spreadsheet?
Thanks
JP
to narrow down issue one can try to run custom script on EVK and
vice versa (EVK script on custom board).
Unfortunately no more logging info is available.
Best regards
igor
I will try running our script with the EVK.
Running the EVK script with out board yields the same error, which is why I'm thinking the values the tool reads from the LPDDR4 don't match the spreadsheet.
The problem is that this message gives us no info as to what the tool has found to be incorrect...
If wiring of the data lines between the i.MX and the LPDDR4 is different from the EVK,
could you recheck "BoardDataBusConfig" Sheet RPA Tool,
"User input MX8M data bit connection to associated LPDDR4 data bit".
Just for reference attached RPA tool for MT53E256M32D2DS part.
Best regards
igor
I just ran the DDR tool with the DS file for our board with the EVK as per your suggestion: it completed succesfully (Success: DDR Stress test completed!!!).
This seems weird since sheet 'BoardDataBusConfig' was modified to match our board. So I would have expected some data errors...
I noticed that upon clicking download the program prints "MX8M-mini: Cortex-A53 is found" when run with the EVK, but it prints "Please re-download with the correct value". Could it be that it's not detecting the SoC to be an i.MX8MM? I assume it's managed to boot the SoC as I believe the text output displayed comes out of the serial port; is this correct?
I will tripple check the 'BoardDataBusConfig' sheet and compare the spreadsheet tomorrow, when I'm rested and less depressed
Hi jp_arnaud
could you leave the density setting at "default" and check if the problem persists?
Best regards
igor