More than 4 CS lines for SPI

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More than 4 CS lines for SPI

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marcus_cps
Contributor I

The documentation for iMX6UL and iMX8 says SPI has 4 CS lines.


I intend to use a total of 12 SPI devices connected to SPI1, 2 and 3 (4 in each).
As far as I understood, I can configure CS pins as GPIO and use the kernel driver configurations to define all 12 CS lines from GPIOs.

Is my understanding correct or is there some hardware limitation I'm missing?

Thanks

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1,188件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Marcus

yes this understanding is correct.

Best regards
igor
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1,189件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Marcus

yes this understanding is correct.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------