Missing a Frame Sync signal from SSI2's I2S2

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Missing a Frame Sync signal from SSI2's I2S2

Contributor III

Hello to all,

The real topic name is: Setting SSI2 in I2S2 Normal Mode of operation, and completely missing a Frame Sync signal from I2S2

I have an unsolvable problem how to set the SSI2 in Normal Mode, using AUDMUX5 as a slave, then outputing this to I2S2 interface.

This is what is my setup *from printk in kernel fsl driver):

fsl_ssi_set_bclk: baudclk_is_used=0, ssi_private->baudclk=-497289280, clkrate=1024000
SSI2 is in Tx Normal Mode, stccr = 0x3
fsl_ssi fsl_ssi_set_bclk: stccr=0x3, mask=0x61fff
fsl_ssi_hw_params: channels=1, sample_size=16, ssi_private->baudclk=-497289280
CCSR_SSI_SCR value is: 0x1117 - SYNC_TX_FS, TCH_EN, SYN, RE, TE and SSIEN enabled
CCSR_SSI_STCR value is: 0x3e1 - LSB_ALIGNED, Both FIFOs enabled, TFDIR, TXDIR enabled
CCSR_SSI_STCCR value is: 0xe003 - WL is 16 (frame SYNC should be 8 KHz, DC 0, SSI2_ROOT clock = 1024000 divided by 4 and then by 2 - 128Kbit baud rate).

As we see from CCSR_SSI_SCR: 0x1117, we see that I2S_MODE is Normal mode (both bits are 0).

The part of the DTS tree (since I am trying to have on SSI2 virtual sound Simple BT Low Quality Audio) looks like this:

Looking through the definitions... In DTS. And I wonder.Here is the definition of the Virtual BT codec::

/* Define the Virtual BT codec */
codec_bt_sco: bt_sco {
#sound-dai-cells = <0>;
compatible = "generic,bt-sco";

And then:

snd_bt_sco: sound-bt {
compatible = "simple-audio-card";
simple-audio-card,name = "sd8787btsco";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dai_ssi2>;
simple-audio-card,frame-master = <&dai_ssi2>;
simple-audio-card,widgets =
"Speaker", "BT_SCO_Output",
"Microphone", "BT_SCO_Input";
simple-audio-card,routing =
"RX", "BT_SCO_Input",
"BT_SCO_Output", "TX";

/* Becomes to be Tx clock Master */
dai_ssi2: simple-audio-card,cpu {
sound-dai = <&ssi2>;

dai_ella_w1: simple-audio-card,codec {
sound-dai = <&codec_bt_sco>;

pinctrl_audmux_5_sg000029: audmux5grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 <<===== No Frame Sync on scope!

What am I doing here wrong???


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2 Replies

NXP TechSupport
NXP TechSupport
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Contributor III

Hello Igor,

Here is the right answer to the question I have posted in the initial post/heading.

Please, if anybody needs to make I2S_normal mode to work with Tx  Frame Sync, it is inevitably to read the following chapter in the i.MX6 manual: i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 6, 05/2020 Gated Clock Mode

Gated Clock mode is often used to connect to SPI-type interfaces on Micro controller
Units (MCUs) or external peripheral chips. In Gated Clock mode, the presence of the
clock indicates that valid data is on the STXD or SRXD ports.

For this reason, no frame sync is needed in this mode. Once transmission of data has
completed, the clock is pulled to the inactive state. Gated clocks are allowed for both the
transmit and receive sections with either internal or external clock in Normal mode.
Gated clocks are not allowed in Network mode. See Table 61-2 ("Clock Pin
Configurations") for SSI configuration for gated-mode operation.

The exact solution is positioned in the Table 61-2 ("Clock Pin Configurations").

Please, read table (SYNC mode) very carefully!


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