Hi all
Let me confirm about the reset value in i.MX27.
I read chapter 3 of MCIMX27 Multimedia Applications Processor Reference Manual (MCIMX27RM Rev. 0.4 06/2012).
Q1
0x1002_700C (SPCTL0) SPLL Control Register 0
The reset value of Table 3-4 and Figure 3-7 doesn't match. Which is correct ?
Q2
0x1002_7018 (PCDR0) Peripheral Clock Divider Register 0
The reset value of Table 3-4 and Figure 3-10 doesn't match. Which is correct ?
Q3
0x1002_701C (PCDR1) Peripheral Clock Divider Register 1
The reset value of Table 3-4 and Figure 3-11 doesn't match. Which is correct ?
Ko-hey
Solved! Go to Solution.
pls see the page 1724 of Reference Manual,
refer to the mx27RM rev0.4, I don't find any different value, SPCTL0 is 0x84FF_1C53, PCDR0 is 0x1204_10C3, PCDR1 is 0x0303_0303.
According to the Table 3-4, the reset value is as follow.
However, description of each register reset value is not match.
Could you check again ?
pls see the page 1724 of Reference Manual,
Reference Manual I sent to you has two table 3-4, do you mind opending the link I sent ,then you would know what I mean.
Hi Joan Xie
I understood there are two table 3-4 and the table 3-4 of section 3-4, 3-9 is same as the each register's detail description.
Thank you for your support.
Ko-hey