Mismatch between CPU and NPU in simple Conv2D on i.MX 8M Plus

[deneriz]

Hi,

We have been working with the VX delegate to execute TFLite models on the NPU of the i.MX 8M Plus which is a VeriSilicon's VIPNano-SI+. Doing so, we have found that there are mismatches between the execution of the model in CPU and in NPU, even with a model with a single Conv2D with a 3x3 kernel and padding 'same'. This plot shows the distribution of this mismatch.

Even more, this mismatch errors propagate along different layers across the model. The attached file contains the decomposition of a model with 20 Conv2D layers into 20 models, each of them adding one layer to the previous one, allowing the measurement of the mismatch after each of the layers. The following plot shows this propagation across the model.

Is there a way to avoid this mismatch?

We are using TFLite Runtime 2.9.1.1 with delegate version lf-5.15.71_2.2.0.

@robertkalmar 

[brian14]

Hi @deneriz, 

Thank you for contacting NXP Support!

I'm in the researching process about this issue. However, I noticed that the BSP version tested is 5.15.71_2.2.0. Have you tried with our latest BSP version?
Is it the same behavior?

Have a great day!

[deneriz]

Hi @brian14,

We have to use the version 5.15.71_2.2.0 because we are using the i.MX 8M Plus through the SolidRun System on Module, and this is the latest version they support.

Thanks for your reply, we'll appreciate any help on this.

[brian14]

Hi @deneriz,

I couldn't find a documented issue for Conv2D with the i.MX8M Plus. However, since you are using a board and software from other vendor I suggest you to contact with your vendor support.
On my side, I will let you know if I can find more details about this issue.

Have a great day!