Memory protection for TCM on i.MX6SoloX

[thomasbenson]

Hello,

Based on my reading of the resource domain controller memory region map in the i.MX6SoloX reference manual, memory protection via the RDC cannot be applied to the tightly coupled memory regions (TCM-L and TCM-U). Is this true? I have a bare-metal application running on the M4 of an i.MX6SoloX and would like to prevent the A9 (running Linux) from being able to access the TCM-L and TCM-U memory regions. I have confirmed that currently I can add the TCM-L and TCM-U memory regions to the device tree in Linux and write to both regions from the A9. Is there any memory protection support available on the i.MX6SoloX to prevent this? Should I use the MPU integrated into the M4 rather than the RDC?

Regards,
Thomas

[igorpadykov]

Hi Thomas

I think your considerations right, as additional memory protection

one can consider Cortex M4 memory protection unit

ARM Information Center 

Best regards
igor
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