MemManage Handler occurred on platform RT1062 with FreeRTOS

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MemManage Handler occurred on platform RT1062 with FreeRTOS

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Edward-Liao33
Contributor I

Hi Sir:

The MCU will occurred the MemManage fault after executed a specific program(on web page OTA function during erase flash), this issue wase not happens on the EVM board,below show as register status after fault occurred:

SDK version:

EdwardLiao33_1-1686714841649.png

FreeRTOS version: V10.3.0

EdwardLiao33_3-1686714915077.png

EdwardLiao33_4-1686714923379.pngEdwardLiao33_5-1686714932074.png

May I have your recommend for the next step?

Best Regards

Edward

 

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joey_weng
NXP Employee
NXP Employee

Hi Omar:

We found this issue is related to heap and stack region settings in lwip_httpscli_ota_enet example code. By default, both heap and stack are put into Default region, which is SRAM_DTC in this example project. It has no problem with smaller image size, but if firmware image is larger than specific size (ex: 1MB), it will cause system crash during flash programming. By setting heap to SRAM_DTC, and setting stack to SRAM_ITC (and enlarged heap to 200K+), this code is able to run normally without issue.

I think this should be a configuration issue with default project settings, maybe it is necessary to report to IDE team or SDK team to modify this configuration in the future release.

Thank you.

 

joey_weng_0-1687328205463.png

 

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joey_weng
NXP Employee
NXP Employee

Hi Omar:

We found this issue is related to heap and stack region settings in lwip_httpscli_ota_enet example code. By default, both heap and stack are put into Default region, which is SRAM_DTC in this example project. It has no problem with smaller image size, but if firmware image is larger than specific size (ex: 1MB), it will cause system crash during flash programming. By setting heap to SRAM_DTC, and setting stack to SRAM_ITC (and enlarged heap to 200K+), this code is able to run normally without issue.

I think this should be a configuration issue with default project settings, maybe it is necessary to report to IDE team or SDK team to modify this configuration in the future release.

Thank you.

 

joey_weng_0-1687328205463.png

 

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello
I hope you are well.

The issue you are having is because the processor attempted a load or store at a location that does not permit the operation. Could you please share with me the memory configuration? At the moment of crash, to what direction are you trying to access?
Additionally,  Add the following to the FreeRTOSConfig.h

#define configTASK_RETURN_ADDRESS   0 

Best regards,
Omar

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Edward-Liao33
Contributor I

Hi Omar:

Thanks for your kindly reply, please see my answer below.

Could you please share with me the memory configuration?

A: Please refer below fig for more details.

EdwardLiao33_0-1686799079250.png

 

EdwardLiao33_1-1686799079252.png

 

EdwardLiao33_2-1686799079237.png

 

EdwardLiao33_3-1686799079153.png

 

 

 

 At the moment of crash, to what direction are you trying to access?

A: An  crash occurred before entering the function "mflash_drv_sector_erase_internal". At the moment, input  value sector_addr=0x240000.

EdwardLiao33_4-1686799079120.png

 

EdwardLiao33_5-1686799079260.png

 


Additionally,  Add the following to the FreeRTOSConfig.h

#define configTASK_RETURN_ADDRESS   0 

A: The constants define has been added on the file. please refer fig below.

EdwardLiao33_6-1686799079606.png

 

 

Best Regards

Edward

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