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MX25 SDMA CSPI example

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NXP TechSupport
NXP TechSupport

Attached is i.MX25 SDMA CSPI example (RVDS 3.1) and document with short description of SDMA basics,

this may be helpful for understanding SDMA module.

Original Attachment has been moved to: MX25PDK_SDMA_CSPI_LED.ZIP

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Contributor III

Hi Igor,

Looking for information about the SDMA on the i.MX6 I found also your document about the i.MX25 and because of the reason that the SDMA on the MX25/51/53/6 shall be exactly the same I had a look add your document.

I’m using the SDK drivers for the i.MX6 to get the SDMA for SPI transmitting running, So far so good. This works for now and I also got deeper into the SDMA. I had to read some documents to understand the working of the SDMA. But there are still some points open. First of all, is it possible to get the SDMA scripts (assembler) which are stored in the ROM of the RISC processor or even the assembler code of the binary scripts from the SDK?

Another point is the CRC block which is described in the MX53 reference manual but removed in the MX6. You also have also described the CA and CS words in the channel context memory structure for the MX25 in your document. Which are even not written in the reference manual of the MX25. Is the CRC block still available?

I’m not using a Linux on the MX6 just a small RTOS with bare metal driver. It would be nice to get more information about the SDMA and even more information about the SDMA scripts (more than described in the reference manual).

Thanks for your support.

B/R

Peter

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NXP TechSupport
NXP TechSupport

Hi Peter

official freescale position is that sdma is provided "as is", that is

customer

should use only existing examples found in BSPs. Regarding additional

information,

like scripts sources, this may be provided only through local marketing

contacts, as

special permission may be needed. CRC is not supported in BSP releases.

I am not aware of any examples using crc.

In general, one can try Freescale Professional Services for requesting

additonal sdma support

http://www.freescale.com/webapp/sps/site/overview.jsp?code=CW_PROFESSIONAL

Best Regards

Igor

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Contributor III

Hi Igor,

To provide it as is, is for functional safety unfortunately not enough ;-).

Also using the examples of the SDK caused some issues, because some points are described different in the reference manual.

I also don’t have a Linux running so the SDK + reference manual is the only way to get thinks working ;-)

With the CRC unit I thought, because it is described in the mx53 is could be possible to use it also on the mx6.

Thanks for your link for the professional service. I will try it.

If could think about any other possibilities to get more information about the SDMA or even other documents please let me know.

Thanks for your effort

BR

Peter

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NXP TechSupport
NXP TechSupport

Hi Peter

link below may be useful

http://billauer.co.il/blog/2011/10/imx-sdma-howto-memory-map/

Best Regards

Igor

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Contributor II

Hello Igor

I'm trying to create a UART/SDMA sample code based on this example.

I thought not too much parameters should be modified for this purpose, but it still doesn't work now. (The transfer seems good, but UART no output...)

Here are the modified points:

=============== CSPI/SDMA =====================

1.    CTXT_CH10_PTR[3] = 0x00000200;   //R1= event mask  [I]

2.    CTXT_CH10_PTR[8] = 0x43FA4004;   // R6= SPI_TXFIFO address base+4

3.    CTXT_CH10_PTR[9] = 0x00000003;   // R7 = watermark

......

4.   reg32_write(SDMA_CHENBL_9, 0x400 );  // SPI1_TX event (9 event) maps to 10chnl

==============================================

============== UART/SDMA =====================

1.    CTXT_CH10_PTR[3] = 0x00080000;   //R1= event mask  [I]

2.    CTXT_CH10_PTR[8] = 0x43F90040;   // R6= UART1_TXFIFO address

3.    CTXT_CH10_PTR[9] = 0x00000003;   // R7 = watermark

......

4.    reg32_write(SDMA_CHENBL_19, 0x400 );  // UART_1_TX event (19 event) maps to 10chnl

==============================================

After starting channel 0, "D" bit and "R" bit works well. Context transfer by Channel 0 looks well.

After enabling UART/SDMA trigger, the "D" bit and "R" bit of channel 10 also looks well. But UART no any output...

Could you please show me is there any other point should be modified for change this sample code to UART peripheral function?

Regards

Ben

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NXP TechSupport
NXP TechSupport

Hello,

I attached example, please look at it.

Best Regards

Igor

34 Views
Contributor I

Dear Igor,


I implements SDMA to i.mx257 U-BOOT for accelerate NAND to MEM copy speed.

and view your document for MX25 SDMA CSPI example

Additionally do you have example for U-BOOT base SDMA transfer from NAND to SDRAM?

Thanks in advance.

Elan

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NXP TechSupport
NXP TechSupport

Hello IS,

sorry not, I have not i.MX25 SDMA example for NAND.

Best Regards

Igor

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34 Views
Contributor I

Dear Igor,

Then shall you advise me how to implement?

And can I get any useful reference?

B/R

IS

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NXP TechSupport
NXP TechSupport

Hi, IS

One can try using the same example with scripts:

mcu_2_app or app_2_app scripts

Some references one can look at i.MX6 SDK, it has some SDMA examples

(basically SDMA engine is the same for all i.MX processors)

"MX6_PLATFORM_SDK "

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q

<http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&nodeI

d=018rH3ZrDRB24A&fpsp=1&tab=Design_Tools_Tab>

&nodeId=018rH3ZrDRB24A&fpsp=1&tab=Design_Tools_Tab

Though I am afraid for NAND there are no examples.

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Contributor I

Hi Igor,

Target; i.mx257 PDK 1.1

U-Boot : ver 2009.08

I ported MX25 SDMA CSPI example source to i.mx257 u-boot.

at the main, PLL and UART is disabled because u-boot already initialized.

//disWDOG();
wait (1500000);
//mx25_pll400();
//UART1_init();
AIPS1init();
AIPS2init();
printf("AIPSinit\n");

Then it blocks here,

while(BDCh10[0]&BD_DONE)

AIPSinit

io_initial_mux

i.MX25 data=f0

sdma_size = 1000

connect buffer descriptors with channel control block

Initialize the other context registers to zero

set up the buffer and extended buffer descriptor

Event override register.

initializing the done_chan_10 flag

SDMA_START 0

BDCh0[0] = 0x1800020

Before Ch 10 start BDCh10[0] = 0x811000

BDCh10[0] 1800020

BDCh10[0] 1800020

Would you please let me know where should I check?

B/R

IS

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NXP TechSupport
NXP TechSupport

Hi IS,

first one can disable mmu/cache in Uboot.

Then one can add debug printfs and check SDMA and CSPI

registers both in Uboot and SDMA example (compare side by side).

Probably one can attached jtag debugger and check registers with jtag.

B/R

Igor

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Contributor II

Dear Igor

I realized that the author of document "iMX25 Basic SDMA activities.pdf" is you!

I have read your document and I want to say thank you because the document is very helpful to me for understanding the basic configuration method of SDMA. After reading this document I decide to follow the step listed in the document to set SDMA to let it work with UART.

There are only 4 parameters that I have changed:

=============== CSPI/SDMA =====================

1.    CTXT_CH10_PTR[3] = 0x00000200;  //R1= event mask  [I]

2.    CTXT_CH10_PTR[8] = 0x43FA4004;  // R6= SPI_TXFIFO address base+4

3.    CTXT_CH10_PTR[9] = 0x00000003;  // R7 = watermark

......

4.  reg32_write(SDMA_CHENBL_9, 0x400 );// SPI1_TX event (9 event) maps to 10chnl

==============================================

            ↓↓↓↓↓↓↓↓↓↓↓↓↓↓

============== UART/SDMA =====================

1.    CTXT_CH10_PTR[3] = 0x00080000;  //R1= event mask  [I]

2.    CTXT_CH10_PTR[8] = 0x43F90040;  // R6= UART1_TXFIFO address

3.    CTXT_CH10_PTR[9] = 0x00000003;  // R7 = watermark

......

4.    reg32_write(SDMA_CHENBL_19, 0x400 );// UART_1_TX event (19 event) maps to 10chnl

==============================================

Unfortunately, after the configuration of SDMA, the SDMA transfer seems well because the following two instructions can be through over:

while(BDCh0[0]&BD_DONE);

while(BDCh10[0]&BD_DONE);

But, UART no any output...

May I ask your help to find out where I have missed for SDMA configuration?

SDMA.jpg

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Contributor II

Dear Igor

Thank you for your support!

This example is the same one that has been included in your first blog.

I want to change this example to UART function, but it doesn't work. Could you please show me is there any point should be taken in mind when change this example to UART peripheral function, or do you have UART based SDMA example we can reference to?

Regards

Ben

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