MMC Issue with Upgrade to Kernel 4.1.15

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MMC Issue with Upgrade to Kernel 4.1.15

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PaulDeMetrotion
Senior Contributor I

I have a custom device based on the MX6Q processor that works fine with Kernel version 3.14.52. I am trying to upgrade to Kernel version 4.1.15 but the boot process will not complete due to MMC issues. Don't know if I am missing a new device tree parameter or a patch file?

The boot process stops at this line: Waiting for root device /dev/mmcblk0p2...

Here is the section of the boot cycle that is MMC specific:

sdhci: Secure Digital Host Controller Interface driver

sdhci: Copyright(c) Pierre Ossman

sdhci-pltfm: SDHCI platform and OF driver helper

/soc/aips-bus@02100000/usdhc@02190000: voltage-ranges unspecified

sdhci-esdhc-imx 2190000.usdhc: could not get ultra high speed state, work on normal mode

sdhci-esdhc-imx 2190000.usdhc: Got CD GPIO

sdhci-esdhc-imx 2190000.usdhc: No vmmc regulator found

sdhci-esdhc-imx 2190000.usdhc: No vqmmc regulator found

mmc0: SDHCI controller on 2190000.usdhc [2190000.usdhc] using ADMA

/soc/aips-bus@02100000/usdhc@02194000: voltage-ranges unspecified

sdhci-esdhc-imx 2194000.usdhc: could not get ultra high speed state, work on normal mode

sdhci-esdhc-imx 2194000.usdhc: No vmmc regulator found

sdhci-esdhc-imx 2194000.usdhc: No vqmmc regulator found

mmc1: SDHCI controller on 2194000.usdhc [2194000.usdhc] using ADMA

The 3.14.52 Kernel has additional MMC messages that I do not see for the newer version. These are here:

mmc0: new high speed SDHC card at address 1234

mmcblk0: mmc0:1234 SA08G 7.21 GiB

mmcblk0: p1 p2

Any insight would be appreciated!

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fabio_estevam
NXP Employee
NXP Employee

Hi Paul,

Please make sure you pass the GPIO_ACTIVE_LOW polarity in your cd-gpios line, like this:

cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;

View solution in original post

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Yuri
NXP Employee
NXP Employee

Hello,

  Have You tried NXP L4.1.15 demo ?

http://www.nxp.com/webapp/Download?colCode=L4.1.15_1.0.0_MX6QDLSOLO&appType=license&location=null&Pa...

Have a great day,
Yuri

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fabio_estevam
NXP Employee
NXP Employee

Hi Paul,

Please make sure you pass the GPIO_ACTIVE_LOW polarity in your cd-gpios line, like this:

cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;

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PaulDeMetrotion
Senior Contributor I

Thanks for the response. Here is what I have in my device tree. I have the CD pin defined as active high.

#define GP_SD1_CS <&gpio1 1 GPIO_ACTIVE_HIGH>

&usdhc1 {

    pinctrl-names = "default";

    pinctrl-0 = <&pinctrl_usdhc1>;

    bus-width = <4>;

    cd-gpios = GP_SD1_CS;

    keep-power-in-suspend;

    status = "okay";

};

&usdhc2 {

    pinctrl-names = "default";

    pinctrl-0 = <&pinctrl_usdhc2>;

    bus-width = <4>;

    keep-power-in-suspend;

    status = "okay";

};

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PaulDeMetrotion
Senior Contributor I

I changed the CD to GPIO_ACTIVE_LOW and the build worked! Thanks.

Why did GPIO_ACTIVE_HIGH work for version 3.14.52 and now it doesn't work for the newer version??

I did notice the following log message that does not appear in the 3.14.52 boot:

          sdhci-esdhc-imx 2190000.usdhc: Got CD GPIO

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fabio_estevam
NXP Employee
NXP Employee

The explanation for using active low for the card detect gpio is provided in this commit:

commit 50eda1546d87542d21eb5a69caf4f046a4bb416e

Author: Dong Aisheng <aisheng.dong@freescale.com>

Date:   Wed Jul 22 20:53:02 2015 +0800

    dts: imx6: fix sd card gpio polarity specified in device tree

   

    commit 89c1a8cf63f8c69dfddb6e377c04df8b25ab1c88 upstream.

   

    cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios

    should be changed to GPIO_ACTIVE_HIGH.

    Otherwise, the SD may not work properly due to wrong polarity inversion

    specified in DT after switch to common parsing function mmc_of_parse().

   

    Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>

    Acked-by: Shawn Guo <shawnguo@kernel.org>

    Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

    Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>=

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