Hi all,
I am developing display driver over MIPI communication. I driver is getting probed but I am unable to see and data communication between processor and display. Please help, its urgent.
> [ 2.458074] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to get blk_ctl
[ 2.479387] imx_sec_dsim_drv 32e10000.mipi_dsi: version number is 0x1060200
[ 2.486592] jd9161z_probe 615 Enter jd9161z_probe
[ 2.491308] GrJo: mipi set drvdata
[ 2.494804] GrJo: video mode read
[ 2.495806] imx6q-pcie 33800000.pcie: PCIe PLL locked after 20 us.
[ 2.498124] GrJo: Parsing for reset pin
[ 2.504346] imx6q-pcie 33800000.pcie: host bridge /soc@0/pcie@33800000 ranges:
[ 2.508164] GrJo:Got panel->reset pin
[ 2.515396] imx6q-pcie 33800000.pcie: IO 0x1ff80000..0x1ff8ffff -> 0x00000000
[ 2.519031] GrJo: reset logic
[ 2.526442] imx6q-pcie 33800000.pcie: MEM 0x18000000..0x1fefffff -> 0x18000000
[ 2.555822] GrJo: GPIO set done
[ 2.558964] GrJo: dev set drvdata
[ 2.562375] GrJo: drm panel added
[ 2.565788] GrJo: rm67191: Exit jd9161z_probe, ret 0
[ 2.570903] imx-drm soc@0:bus@32c00000:display-subsystem: bound 32e10000.mipi_dsi (ops imx_sec_dsim_ops)
[ 2.580982] [drm] Initialized imx-drm 1.0.0 20120507 for soc@0:bus@32c00000:display-subsystem on minor 1
[ 2.590488] GrJo: shine_panel_get_modes
[ 2.594418] GrJo: mode duplicate called
[ 2.598346] GrJo: set mode called
[ 2.601751] GrJo: probe added called
[ 2.605422] GrJo: info set bus format called
[ 2.613329] No hblank data for mode 480x960 with 1 lanes
[ 2.617758] GrJo: Enter rad_panel_prepare()
[ 2.617759] GrJo: Enabling backlight
[ 2.617760] GrJo: After backlight enable
[ 2.643839] GrJo: performing panel reset sequence
[ 2.648988] GrJo: Exit shine_panel_prepare()
[ 2.648991] GrJo: dsi format 0
[ 2.648992] GrJo: Enter shine_panel_enable()
[ 2.648994] GrJo: shine_panel_push_cmd_list()
[ 2.648996] Enter shine_panel_push_cmd_list ...
[ 2.648998] Enter shine_init_sequence ...
[ 3.479850] imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out
[ 3.479854] ret value of read -16 , actual read value 0
[ 3.479856] Exit shine_panel_push_cmd_list normally.
[ 3.479857] GrJo: init sequence completed *********
[ 3.479858] GrJo: Exit shine_panel_enable()
[ 3.497340] No hblank data for mode 480x960 with 1 lanes
[ 3.519622] Console: switching to colour frame buffer device 60x60
[ 3.519732] No hblank data for mode 480x960 with 1 lanes
[ 3.540672] imx6q-pcie 33800000.pcie: Phy link never came up
[ 3.541989] imx-drm soc@0:bus@32c00000:display-subsystem: fb0: imx-drmdrmfb frame buffer device
static const struct drm_display_mode default_mode = {
.clock = 33000,
.hdisplay = 480,
.hsync_start = 480 + 20,
.hsync_end = 480 + 20 + 20,
.htotal = 480 + 20 + 20 + 20,
.vdisplay = 960,
.vsync_start = 960 + 15,
.vsync_end = 960 + 15 + 16,
.vtotal = 960 + 15 + 16 + 4,
.vrefresh = 60,
.width_mm = 23,
.height_mm = 77,
//.bpc = 8,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
dts mipi entry ->
I have attached screenshot of my two lane MIPI-DSI. Clock pulses are discontinuous and less (as seen after zooming the screenshot). My panel is not working. can you please provide me any lead?
The mipi controller can't receive the dsi packet, maybe you need put some panel configuration before "imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out"
I have attached few details in post. can you help me to give a lead? I am stuck at this from long time.