MIPI CSI2 Base address switching change error on IMX8mQ

[Deepak3]

Hello NXP team,

I am working on imx8mq platform to integrate ON Semi camera sensor using AP1302 ISP (CAM1 – Shiratech Solutions (shiratech-solutions.com)). I am working on following On Semi camera sensor where i am getting Base address switching change err during streaming time and when this error comes, at that time streaming is not coming.

• ARX3A0 -   I have configured AP1302 to stream on 4 data lanes and I am setting 560x560@120fps and with this resolution, streaming is not working.

I am using NXP latest Yocto hardknot release and 5.10 linux kernel. And I am using following DTS configuration for MIPI CSI:

Can someone please check my configuration and suggest solution for it.

# AP1302 configuration:
&i2c3 {
        ap1302_mipi: ap1302@3d {
                compatible = "onnn,ap1302";
                reg = <0x3d>;

                pinctrl-0 = <&pinctrl_csi>;
                clocks = <&clk IMX8MQ_CLK_CLKO2>;
                clock-names = "xclk";
                assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>,
                                  <&clk IMX8MQ_CLK_CLKO2>;
                assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_200M>;
                assigned-clock-rates = <0>, <20000000>;

                reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
                standby-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
                i2csel-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
                isptrig-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
                status = "okay";

                port {
                        ap1302_ep: endpoint {
                                remote-endpoint = <&mipi1_sensor_ep>;
                                data-lanes = <1 2 3 4>;
                        };
                };

                sensors {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        onnn,model = "onnn,arx3a0";
                        sensor@0 {
                                reg = <0>;
                        };
                };
        };
};

&mipi1_sensor_ep {
        remote-endpoint = <&ap1302_ep>;
        data-lanes = <1 2 3 4>;
        csis-wclk;
};
# MIPI CSI Host configuration:
                        mipi_csi_1: mipi_csi1@30a70000 {
                                compatible = "fsl,mxc-mipi-csi2_yav";
                                reg = <0x30a70000 0x1000>;
                                interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MQ_CLK_CSI1_CORE>,
                                                <&clk IMX8MQ_CLK_CSI1_ESC>,
                                                <&clk IMX8MQ_CLK_CSI1_PHY_REF>;
                                clock-names = "clk_core", "clk_esc", "clk_pxl";
                                assigned-clocks = <&clk IMX8MQ_CLK_CSI1_CORE>,
                                                  <&clk IMX8MQ_CLK_CSI1_PHY_REF>,
                                                  <&clk IMX8MQ_CLK_CSI1_ESC>;
                                assigned-clock-rates = <266000000>, <333000000>, <66000000>;
                                power-domains = <&pgc_mipi_csi1>;
                                csis-phy-reset = <&src 0x4c 7>;
                                phy-gpr = <&iomuxc_gpr 0x88>;
                                status = "disabled";
                        };

                        csi1_bridge: csi1_bridge@30a90000 {
                                compatible = "fsl,imx8mq-csi", "fsl,imx6s-csi";
                                reg = <0x30a90000 0x10000>;
                                interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MQ_CLK_DUMMY>,
                                        <&clk IMX8MQ_CLK_CSI1_ROOT>,
                                        <&clk IMX8MQ_CLK_DUMMY>;
                                clock-names = "disp-axi", "csi_mclk", "disp_dcic";
                                status = "disabled";
                        };

[joanxie]

could you check the value of BASEADDR_SWITCH_EN and BASEADDR_SWITCH_SEL?

[Deepak3]

Hi @joanxie ,

I got the following information from mx6s_capture driver (drivers/media/platform/mxc/capture/mx6s_capture.c)

static const struct mx6s_csi_soc mx8mq_soc = {
.rx_fifo_rst = true,
.baseaddr_switch = 0x80030,
};

And can you let me know  how to check the value of BASEADDR_SWITCH_EN and BASEADDR_SWITCH_SEL on IMX8mQ platform?

[joanxie]

baseaddr_switch = 0x80030 set correct for BASEADDR_SWITCH_EN and BASEADDR_SWITCH_SEL

Base Address change error is generated when the base address changed while the last, refer to the BASEADDR_CHHANGE_ERROR in the CSI_CSISR

When using base address switching enable, BASEADDR_CHHANGE_ERROR bit of CSIx_CSISR will be 1 when switching occur before DMA complete.

This bit will be clear by writing 1.
When this interrupt happens, follow the steps listed below.
1. Unassert the CSI enable, CSIx_CSICR18 bit31,
2. Reflash the DMA, assert the CSIX_CSICR3 bit 14,
3. Assert the CSI enable, CSIx_CSICR18 bit31

[Deepak3]

Hi @joanxie,

All the steps are already followed in the mx6s_capture.c driver to clear base address switch change interrupt. When this interrupt occurs, at that time I am not able to see streaming. Can you help me to solve streaming issue when this base address switching change interrupt occurs. I have also attached mx6s_capture.c driver file for your reference.

[joanxie]

what did you change in the imx6s_capture.c? and could you dump csi status register?

[Deepak3]

Hi @joanxie ,

I have added single change in imx6s_capture.c file as following:

-#define MAX_VIDEO_MEM 64
+#define MAX_VIDEO_MEM 128

And i have dumped CSI status register value when base address switching change error occurs. Please see the attached file.

[Deepak3]

Hi @joanxie ,

Could you please help me with steps of dumping CSI status register?

[joanxie]

you can use mem tool under unit test

[Deepak3]

Hi @joanxie , I have added single change in imx6s_capture.c file as following: -#define MAX_VIDEO_MEM 64 +#define MAX_VIDEO_MEM 128 And i have dumped CSI status register value when base address switching change error occurs. Please see the attached file.