Hi community,
Our customized board using iMX7 soc and run kernel 4.9.11
Recently we used vendor's new date-code PHY, we had an issue where ping sometimes fail. After we provided MDIO/MDC log, they said the hold time of MDIO is sometimes not enough. Please see the attached screen shot, the failing edge in OPcode filed should align to red line to match 802.3 spec, the hold time must be at least 10ns.

I read iMX7 reference manual and found there is a MII Speed Control Register can set hold time. I read the register the default value is 0x262. The hold time value is 010b. ("3 internal module clock cycles"). I try to change the hold time bits to 011. But this no any help, the failing edge no any change. Then I change to 111, this value cause whole MDIO waveform shift and cause PHY not work.
I checked the device tree, it seems no parameter can set the hold time of MDIO. I also traced the fec_main.c, the fec_enet_mdio_read/write() call writel() to send command and writel() only save the command to FEC_MII_DATA address then return. So I don't have any idea to fix this issue.
Can someone please help me about how to change the MDIO hold time. Thank you very much.