LVDS dual channel display on IMX6Q

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

LVDS dual channel display on IMX6Q

ソリューションへジャンプ
5,284件の閲覧回数
gregoryciapa
Contributor II

Hi,

I have a custom carrier board, based on IMX6Q plus a SOM and an LVDS dual channel 19'' SXGA display connected on it.

I use kernel 3.14.52.

Backlight, colors and vertical resolution are ok and i am able to display an image on the linux framebuffer with the fbv tool.

However the image is always not properly rendered horizontally. The screen format is 1280 x 1024 but if i want to display an image 1280 x 1024 only half of the image is visible horizontally. To illustrate this, here is a screenshot (made with fgrab) showing a 1280 x 1024 image in the background and, in the foreground the complete image forced to fit the screen with fbv -f option :

screenshot.png

The background image is horizontally half of the superposed foreground image.

Actually, everything that is displayed is horizontally stretched : tux logo at boot, or boot messages from the framebuffer console, or any images, a 128 x 128 image for example will be shown as a rectangle, not a square.

I guess my device tree file is not 100% correct :

&ldb {
   lvds-channel@0 {
      crtc = "ipu1-di0";
   };

   lvds-channel@1 {   
      crtc = "ipu1-di1";
   };
};

mxcfb1: fb@0 {
   compatible = "fsl,mxc_sdc_fb";
   disp_dev = "ldb";
    interface_pix_fmt = "RGB24";
   default_bpp = <24>;
   int_clk = <0>;
   late_init = <0>;
   status = "okay";
};

&mxcfb2 {
status = "disabled";
};

&mxcfb3 {
status = "disabled";
};

&mxcfb4 {
status = "disabled";
};

&ldb {
status = "okay";
dual-mode;

   lvds-channel@0 {
      fsl,data-mapping = "spwg";
      fsl,data-width = <24>;
      status = "okay";

         display-timings {
            timing01: AUO-G190ETN01 {
            clock-frequency = <54000000>;
            hactive = <640>;
            vactive = <1024>;
            hback-porch = <200>;
            hfront-porch = <3>;
            vback-porch = <39>;
            vfront-porch = <1>;
             hsync-len = <1>;
            vsync-len = <2>;

          };
      };
   };

 lvds-channel@1 {
      fsl,data-mapping = "spwg";
      fsl,data-width = <24>;
      status = "okay";

         display-timings {
            timing02: AUO-G190ETN01 {
            clock-frequency = <54000000>;
            hactive = <640>;
            vactive = <1024>;
            hback-porch = <200>;
            hfront-porch = <3>;
            vback-porch = <39>;
            vfront-porch = <1>;
             hsync-len = <1>;
            vsync-len = <2>;

          };
      };
   };

};

I cannot find any example of an LVDS dual channel device tree, what am i doing wrong ? 

Here is attached the specification of the LVDS display, not all parameters are explicitly written but i have based my device tree on the typical values.

I have tried different combinations of these parameters but it does not fix this.

I would really appreciate any help or hints as i am not an expert in this field.

Thanks a lot.

ラベル(3)
0 件の賞賛
1 解決策
3,364件の閲覧回数
gregoryciapa
Contributor II

I finally could find the right values for the LCD screen, with the help of my SOM provider :

&ldb {
status = "okay";
split-mode;
   lvds-channel@0 {
      fsl,data-mapping = "spwg"; 
      fsl,data-width = <24>;
      primary;
      status = "okay";
          display-timings {
            timing01: AUO-G190ETN01 {
            clock-frequency = <108000000>;
            hactive = <1280>;
            vactive = <1024>;
            hback-porch = <203>;
            hfront-porch = <203>;
            vback-porch = <41>;
            vfront-porch = <41>;
             hsync-len = <2>;
             vsync-len = <2>;
          };
      };
   };


 lvds-channel@1 {
      fsl,data-mapping = "spwg"; 
      fsl,data-width = <24>;
      status = "okay";
          display-timings {
            timing02: AUO-G190ETN01 {
            clock-frequency = <108000000>;
            hactive = <1280>;
            vactive = <1024>;
            hback-porch = <203>;
            hfront-porch = <203>;
            vback-porch = <41>;
            vfront-porch = <41>;
             hsync-len = <2>;
             vsync-len = <2>;
          };
      };
   };
};

Basically, one need to multiply values by 2 for the clock-frequency.

For me, other values are still "magically" set ( multiplied by 2 as well but not from my initial device tree).

The key point here was to understand how to translate the LVDS timings specifications into device tree timings.

It is still not clear at all because most of those values are not explicitly defined in the specifications.

I think it would be useful if someone could explain this "translation" process.

But anyway, the display is fine now.

元の投稿で解決策を見る

0 件の賞賛
2 返答(返信)
3,365件の閲覧回数
gregoryciapa
Contributor II

I finally could find the right values for the LCD screen, with the help of my SOM provider :

&ldb {
status = "okay";
split-mode;
   lvds-channel@0 {
      fsl,data-mapping = "spwg"; 
      fsl,data-width = <24>;
      primary;
      status = "okay";
          display-timings {
            timing01: AUO-G190ETN01 {
            clock-frequency = <108000000>;
            hactive = <1280>;
            vactive = <1024>;
            hback-porch = <203>;
            hfront-porch = <203>;
            vback-porch = <41>;
            vfront-porch = <41>;
             hsync-len = <2>;
             vsync-len = <2>;
          };
      };
   };


 lvds-channel@1 {
      fsl,data-mapping = "spwg"; 
      fsl,data-width = <24>;
      status = "okay";
          display-timings {
            timing02: AUO-G190ETN01 {
            clock-frequency = <108000000>;
            hactive = <1280>;
            vactive = <1024>;
            hback-porch = <203>;
            hfront-porch = <203>;
            vback-porch = <41>;
            vfront-porch = <41>;
             hsync-len = <2>;
             vsync-len = <2>;
          };
      };
   };
};

Basically, one need to multiply values by 2 for the clock-frequency.

For me, other values are still "magically" set ( multiplied by 2 as well but not from my initial device tree).

The key point here was to understand how to translate the LVDS timings specifications into device tree timings.

It is still not clear at all because most of those values are not explicitly defined in the specifications.

I think it would be useful if someone could explain this "translation" process.

But anyway, the display is fine now.

0 件の賞賛
3,363件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi gregoryciapa

seems for lvds lcd with odd/even line inputs (as in attached file) split mode should be used,

below detailed overview of such mode provided by toradex:
https://www.toradex.com/community/questions/20707/lvds-split-mode-vs-dual-mode-imx6-eglfs.html
https://www.toradex.com/community/questions/2111/how-to-configure-lvds-in-dual-channel-with-kernel.h...

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------