LVDS Syncronization on iMX6 to an external clock

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LVDS Syncronization on iMX6 to an external clock

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rickburnett
Contributor I

I have an application for an iMX6Solo that I am evaluating using the UDOO Neo board at the moment.  One of the requirements is that I need to synchronize the LVDS output to a genlock from another device.  

The user manual talks about "synchronization and control" capabilities, but I am not understanding how this might work.  Can I syncronize the output of frames through the LVDS interface to an external clock?

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Rick

there is no way to syncronize the output of LVDS interface (LDB module)

to an external clock. References in RM descriptions of LDB module to some "external clock"

justmeans the clock source is from IPU, it doesn't mean the clock is from an external pin.

LCDIF interface is parallel interface of LCDIF module, it is different from LDB module

(LVDS interface).

Best regards
igor
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rickburnett
Contributor I

Thanks for your answer on LVDS, makes sense.

What about LCDIF, it would seem I could synchronize that to the timing output of the NTSC decoder, is that true?  In my application, I have no problem switching to LCDIF instead because the parallel actually works better in my case.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Rick

could you point LCDIF description in Reference Manual where it described

this could synchronize timing output of the NTSC decoder.

Best regards
igor

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rickburnett
Contributor I

The diagram on page 4655 shows the VADC -> Video Decoder which then shows an output to multiple destinations, CSI, LCDIF, PXP, GIS, but without a huge amount of detail.  That's where I was hoping I could synchronize the output out of LCDIF based on the timing of the VADC decoded NTSC (or PAL) input.

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igorpadykov
NXP TechSupport
NXP TechSupport

if you are speaking about i.MX6SX Reference Manual, there is no direct path of

synchronization of VADC to signals of LCDIF.

Best regards
igor

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rickburnett
Contributor I

Do you know if there is any application notes explaining using the VADC in?  I've been searching for them to try and understand how the data moves inside the core.  Once the frame is decoded I would imagine something tells me the frame is done.  I wonder if I can use that information to determine when to do something on the LCDIF (or GPIO).

Right now the only other option I am seeing is some analog circuitry/fpga to extract the sync from the CVBS signal coming in and then driving the clocks needed by the LCDIF.  

Thanks for taking the time to answer these questions.

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rickburnett
Contributor I

Let me expand on this question a little as well, looking past the NEO board.

Looking deeper in the reference material it appears I could use an NTSC or PAL input to the VADC and generate timing signals to drive out of the LCDIF interface.  That would be in sync with our incoming video (since we are working in NTSC and PAL).


Is that correct?

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