LVDS Display

[johnturnur]

Hi,

I Want to get 1080P output on imx6, for Android OS.

I have follwoing qestions in my mind.

- What changes is required to get output on LVDS1 insted of LVDS0?

- It is possible to get 1080P output on LVDS with single changel? or do i need to use dual channel in spit mode? What are the changes required for that?

- Does current kernel support all this?

- Can you provide more detailed document for LVDS? ( I have IMX6DQRM.pdf)

John

[mauriciorodrigu]

Hi guys. I am working on a iMX6.Q7A-551Board together with a Imx6 freescale processor. We are running Android. When android goes in to deep sleep LVDS system still consume 60 mA. Will it be ok to cut the power off while sleeping and then reestablish it when Android wakes up? Or would it require some kind of sync when waking up,

[arielos]

Hi,

For single-channel output LVDS the pixel clock is limited to 85 MHz, because of that the maximum resolution of LVDS single-channel output port is 1366x768 @ 60HZ with 35% blanking.

If a higher resolution is needed, the split mode has to be used. In this case one LVDS port outputs ODD data and the other port EVEN data.

The pixel clock is limited to 170 MHz (e.g. UXGA 1600x1200 @ 60 Hz with 35% blanking).

Is it possible to reducing the blanking time to minimum, less than 35% blanking ?

That in order to rising the resolution on single-channel output LVDS port to SXGA (1280x1024 @ 60Hz).

(The target is FPGA which can analysis the single-channel output LVDS out of standard)

Thanks

Ariel

[saurabh206]

Hi,

ariel

Blanking time is depended on you display.

[cgg]

Hello

I understood the underline part and I want also a full hd resolution over LVDS:

For single-channel output LVDS the pixel clock is limited to 85 MHz, because of that the maximum resolution of LVDS single-channel output port is 1366x768 @ 60HZ with 35% blanking.

If a higher resolution is needed, the split mode has to be used. In this case one LVDS port outputs ODD data and the other port EVEN data.

The pixel clock is limited to 170 MHz (e.g. UXGA 1600x1200 @ 60 Hz with 35% blanking).

Could anyone explain me how can I conect the LVD0 and LVD1 to a display please? I have worked only with displays with one LVDS connector. Sorry I am new with this topics. Should I put a chip to converter from LVDS0 and LVDS1 to a LVDS display connector?

Kind regards

[xizhouwang]

Copied this from the Web explain the i.MX6 LVDS, hope it helps.

LVDS Serialization

Another limitation by using the LVDS interfaces is the maximum clock of the LVDS serializer. For single-channel output the pixel clock is limited to 85 MHz per LVDS port. This results in a maximum resolution of WXGA (1366x768 @ 60HZ with 35% blanking), for example. If a higher resolution is needed, the split mode has to be used. In this case one LVDS port outputs ODD data and the other port EVEN data. The pixel clock is limited to 170 MHz (e.g. UXGA 1600x1200 @ 60 Hz with 35% blanking). To use the split mode, you need a display supporting the dual channel LVDS mode in order to receive odd and even pixel data!

[saurabh206 · Accepted solution]

Hi,

To Get 1080p you need to use LDB split mode.

video=mxcfb0:dev=ldb,LDB-1080P60,if=RGB666 ldb=spl0 fbmem=24M

This should solved your problem.

Thanks,

Saurabh

Picustech Software

[patrickdietrich]

So to clarify - if I am to get 1080p (Ie. 1920x1080 @ 60fps) out of the i.MX6 LDB/LVDS channel.

How many LVDS data pairs and clocks do i need to utilize?

[Rooney]

Hello!

I've troubles with the LVDS interface on the i.MX6Q as well.

I'm using the Variscite VAR-SOM-MX6 and connected a G121XN01 XGA LVDS display to the LVDS1 port.

The linux kernel is 3.0.35.

In U-Boot I use video=mxcfb0:dev=ldb,LDB-XGA,if=RGB24 ldb=sep1 as kernel command line.

I can see something on the display (see picture below) but unfortunately it is not the expected result. The resolution seems to be strange. The display even shows the same content three times, whereby at least on content (in the middle of the display) uses wrong colors.

If I use LDB-1080P60 instead of LDB-XGA (just for testing purpose) I would expect a difference, but there is none.

Does anyone have an idea what could be wrong? Do I need to do further configuration in the plattform specific code?

Regards,

Rooney

[saurabh206]

Hi,

Can you try

" video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666"

Thanks,

Saurabh Patel

[Rooney]

Hello Saurabh,

the only difference is the brightness of the shown tux, so the pixel format is okay.

In the meantime I could solve the problem. If I disable the configuration option FB_MXC_VAR_WVGA_SYNC_PANEL everything is working okay. This option is Variscite related and defines a specific LCD panel. Nevertheless it is strange that this results in such a strange behaviour. However, it works, thanks!!

Regards,

Rooney

[soujanyak]

Hello Saurabh,

I am trying to interface 1024RGB×768  LVDS display over LVDS0 interface on i.MX6, i am able to see the u-boot logo on the display but it is as shown below :

--> Linux kernel is 3.0.35 and the boot arguments are as below :

setenv bootargs console=ttymxc0,115200 init=/init rw video=mxcfb0:dev=ldb,LDB-XGA

-->The platform data is as below :

static struct fsl_mxc_ldb_platform_data ldb_data = {

        .ipu_id = 1,

        .disp_id = 0,

        .ext_ref = 1,

        .mode = LDB_SEP0, 

        .sec_ipu_id = 1,

        .sec_disp_id = 1,

};

Kindly let me if there Is any other configuration that needs to be done in addition to above?

Thanks

Soujanya

[fabio_estevam]

Is this a custom board and LVDS panel? Looks like you need to adjust its timings in U-boot.

Check the displays struct in:

board/freescale/mx6qsabrelite/mx6qsabrelite.c

[soujanyak]

Thanks Estevam...

              In u-boot i have adjusted the display timings and now i am able to boot my 1024X768 LVDS display (RGB666).

Hello,

Now i am trying to interface 1920X1200 LVDS display with i.MX6 processor, and this display is having RGB24 bits.

Following were the changes i made :

(a)In uboot-imx/board/freescale/mx6qsabrelite/mx6qsabrelite.c :

{

        .bus    = -1,

        .addr   = 0,

        .pixfmt = IPU_PIX_FMT_LVDS888,

        .detect = 0,

        .enable = enable_lvds,

        .mode   = {

                .name           = "HYDIS-1920X1200display",

                .refresh        = 60,

                .xres           = 1920,

                .yres           = 1200,

                .pixclock       = 7692,

                .left_margin    = 100,

                .right_margin   = 40,

                .upper_margin   = 30,

                .lower_margin   = 3,

                .hsync_len      = 10,

                .vsync_len      = 12,

                .sync           = FB_SYNC_EXT,

                .vmode          = FB_VMODE_NONINTERLACED

}

(b)In u-boot kernel arguments i am configuring it as :

setenv bootargs $bootargs video=mxcfb0:dev=ldb,LDB-HYDIS,if=RGB888 fb=28M

(c)In the file : arch/arm/mach-mx6/board-mx6q_sabrelite.c

static struct ipuv3_fb_platform_data sabrelite_fb_data[] = {

        { /*fb0*/

        .disp_dev = "ldb",

        .interface_pix_fmt = IPU_PIX_FMT_RGB24,

        .mode_str = "LDB-HYDIS",   

        .default_bpp = 24,

         .int_clk = false,

        }

}

static struct fsl_mxc_ldb_platform_data ldb_data = {

        .ipu_id = 1,

        .disp_id = 0,

        .ext_ref = 1,

        .mode = LDB_SPL_DI0, 

        .sec_ipu_id = 1,

        .sec_disp_id = 1,

};

(d)In the file : drivers/video/mxc/ldb.c

according to 1920X1200 LVDS display timings :

static struct fb_videomode ldb_modedb[] = {

        {

         "LDB-HYDIS", 60, 1920, 1200, 6615,

         30, 30,

         15, 5,

         60, 15,

         0,

         FB_VMODE_NONINTERLACED,

         FB_MODE_IS_DETAILED,},

}

With all the above changes also i am unable to see anything on the display?

What other configurations i need to take care inorder to enable 1920X1200 LVDS display.

Thanks

Soujanya

[johnturnur]

Its working for me.

But I am not able to output with 2 channel, 8-bit LVDS panel?

Is there any settting or modification is required for this?

[soujanyak]

Hello,

          I am also trying to interface 1920X1200 LVDS display onto imx6 sabre-sd board, and i am trying to interface it on LVDS0,

       i am unable to find the following answers :

        (a)will IMX6 platform support 1920X1200 LVDS display ?

        (b) what are the u-boot arguments i have to change

        (c) do i need to use LVDS split mode or single mode?

          (d) and my 1920X1200 display is having a aspect ration of 16:10, is it supported by imx6 platform.

Can anyone kindly provide answers to my above questions.

Thanks

[dhrumildoshi]

Hi Soujanya,

I hope you have achieved 1920x1200 @60Hz using dual LVDS channels. I need to do the same but the difference is 1920x1200 @30Hz using single LVDS channel (LVDS0).

I have done changes accordingly in board's .dtsi file, but didn't get success.

Can you please guide me for the same?

Best Regards,

Dhrumil

[saurabh206]

Hi,

I am not sure about 1920x1200 but it should work,

- To add a support you need to modify the ldb.c file. update the ldb_modedb structure according to your panel's data sheet.

-  video=mxcfb0:dev=ldb,LDB-1920P,if=RGB666 ldb=spl0

- single mode willnot work you need to use split mode.

Thanks,

Saurabh

[soujanyak]

Hello,

       Thanks for your answers, but still i am unable to see anything on the display.

I am using the following u-boot arguments :

video=mxcdi0fb:RGB8880:dev=ldb,LDB-1920P,if=RGB888 ldb=spl0 fb0base=0x27b00000 fbmem=28M

My LVDS display is interfaced over 4LVDS data lanes ==>

LVDS0_TX0_N

LVDS0_TX0_P

LVDS0_TX1_N

LVDS0_TX1_P

LVDS0_TX2_N

LVDS0_TX2_P

LVDS0_TX3_N

LVDS0_TX3_P

so i am using if=RGB888 , is my analysis correct?

Apart from above the display i am using needs an aspect ration of 16:10, what code changes have to be done for this?

Thanks

[saurabh206]

Hi,

Make sure that the values are the

static struct fb_videomode ldb_modedb[] are correct.

if color values are not set properly then you may get saturated output.

Thanks,

Saurabh

Picustech Software

[SergioSolis]

Yes, it does work on 1920x1200