LUT - The lookup table (LUT) is used to modify pixels in a manner that is not linear.

[Alex_04]

Hi

Asper IMX6SDLRM

53.3.15 LUT  The lookup table (LUT) is used to modify pixels in a manner that is not linear and that

cannot be achieved by the color space conversion modules.  Nonlinear response to the input pixels can be achieved based on how the lookup table is

programmed.

Could you please let me know whether BSP[Linux Kernel] can support the LUT Especially [53.3.15 LUT].

Regards,

Alex

[Yuri]

I am afraid Freescale BSP does not support IPU LUT :
“ the common kernel video API is utilized for setting colors, palette registration,
image blitting and memory mapping. The IPU reads the raw pixel data from the
frame buffer memory and sends it to the panel for display.”

Have a great day,
Yuri

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[Alex_04]

Hi,

Thanks for the information. Searching for LUT(lookup table) in Pixel Pipeline (PXP) in IMX6SDLRM. [chapter : 53.3.15 LUT]

Following the pxp_lib_test in imx-linux-test-imx, for Kernel 3.10.17,

Able to enable in Kernel Configuration

CONFIG_MXC_PXP_V2=y

CONFIG_MXC_PXP_CLIENT_DEVICE=y

CONFIG_DMA_ENGINE=y

Able to find the corresponding node /dev/pxp_device.

Interrupt and its service are registerd in cat /proc/interrupts

130:

0

GIC  pxp-dmaengine

Kernel thread and its service , known by ps command

89 root

0 SW   [pxp_dispatch]

While running the Application

./pxp_test.out -I "-o /home/root/abc.txt " ,  getting warning pxp_dispatch_thread: task is timeout

Please help to resolve the issue , if any body come across the issue.

Unable to see CONFIG_IMX_HAVE_PLATFORM_IMX_PXP in Kernel Configuration.

[Yuri]

Please look at the following  thread - if Your i.MX6 SDL supports the PXP

https://community.freescale.com/message/506178

Regards,

Yuri.

[Alex_04]

Hi,

     Yes , I have followed the thread https://community.freescale.com/message/506178,

     In u-boot command line , I am unable to read  PXP [Pixel Pipeline] Registers,

    Using md.w 0x20f0000 1  command to read the PXP [Pixel Pipeline] Register , it hangs.

Please help to read and write PXP Registers

Regards,

Alex

[Yuri]

What is part number of Your i.MX6 ?

Regards,

Yuri.

[Alex_04]

Hi

PART NUMBER : MCIMX6S5EVM10AC

Please help out to read and write PXP [Pixel Pipeline]Registers at u-boot command level

Regards,

Alex

[Yuri]

Alex,

The PXP is clearly stated in IMX6SDLCEC, which is Datasheet for MCIMX6S5EVM10AC.

But - looks like - it may be disabled on fuse level. Please check OCOTP_CFG2, bit 31.

(Address 0x021B_C430)
  

Regards,

Yuri.

[Yuri]

Please refer to the following thread regarding PXP testing

It makes sense to wait final results.

Regards,

Yuri.