LPSPI and NOSTALL Behavior on IMX8

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LPSPI and NOSTALL Behavior on IMX8

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paul_katarzis
Contributor III

Is the following normal behavior for the LPSPI:

  • When NOSTALL is set to 0, the clock line idles high or low to ensure that the last bit of the last word written on MOSI is not sampled until another word is loaded into the TX FIFO. What you would see on an oscilloscope is an unusually long clock pulse. In other words, if you write a single word to the TX FIFO and wait for the RX FIFO to receive a word from the slave, you will end up seeing that the RX FIFO stays empty until you load a second word into the TX FIFO.
  • When NOSTALL is set  to 1, the LPSPI continuously pulses the clock line in groups of size FRAMESZ+1 when the TX FIFO is empty. In other words, when the TX FIFO is empty, the LPSPI keeps running the clock which in turn fills up the RX FIFO with junk data.

The former seems reasonable for some circumstances, but is causing some issues with a Linux driver I am troubleshooting. However, the latter does not seem reasonable. I cannot determine if this is normal behavior for the LPSPI or there is something else going on with the driver.

Update:

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Paul

seems this is normal behavior as described on below part of i.MX8 Reference Manual

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Best regards
igor
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paul_katarzis
Contributor III

Hello Igor,

The documentation seemed quite vague to me. After thinking about it, I can see the clock free running being expected behavior. When stalling is disabled, the clock free runs until a transmit command word is written indicating that the transfer should end.

However, the issue with the last bit of the last word not being sampled with stalling enabled seems to be an actual issue with the LPSPI IP according to the link I included in my original post.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Paul

seems this is the same IP as in link which you referenced.

Best regards
igor

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