LPDDR4 issue in DDR Stress Tool

[sahilnayak]

Hi,

We are running our script file for 4GB LPDDR4 in the mscale DDR Stress tool and below are the logs of it. We are getting Invalid Target print after all configurations are done for LPDDR4:

Downloading file 'bin\lpddr4_train1d_string.bin' ..Done

Downloading file 'bin\lpddr4_train2d_string.bin' ..Done

Downloading file 'bin\lpddr4_pmu_train_1d_imem.bin' ..Done

Downloading file 'bin\lpddr4_pmu_train_1d_dmem.bin' ..Done

Downloading file 'bin\lpddr4_pmu_train_2d_imem.bin' ..Done

Downloading file 'bin\lpddr4_pmu_train_2d_dmem.bin' ..Done

Downloading IVT header...Done
Downloading file 'bin\m850_ddr_stress_test.bin' ...Done

Download is complete
Waiting for the target board boot...

********Found PMIC PF0100**********

*************************************************************************

*************************************************************************

*************************************************************************
MX8 DDR Stress Test V3.10
Built on Feb 5 2020 14:08:44
*************************************************************************

--Set up the MMU and enable I and D cache--
- This is the Cortex-A53 core
- Check if I cache is enabled
- Enabling I cache since it was disabled
- Push base address of TTB to TTBR0_EL3
- Config TCR_EL3
- Config MAIR_EL3
- Enable MMU
- Data Cache has been enabled
- Check system memory register, only for debug

- VMCR Check:
- ttbr0_el3: 0x91d000
- tcr_el3: 0x2051c
- mair_el3: 0x774400
- sctlr_el3: 0xc01815
- id_aa64mmfr0_el1: 0x1122

- MMU and cache setup complete

*************************************************************************
ARM clock(CA53) rate: 800MHz
DDR Clock: 1600MHz

============================================
DDR configuration
DDR type is LPDDR4
Data width: 32, bank num: 8
Row size: 16, col size: 10
Two chip selects are used
Number of DDR controllers used on the SoC: 1
Density per chip select: 2048MB
Density per controller is: 4096MB
Total density detected on the board is: 4096MB
============================================

Invalid Target(Request=0xd, CoreID=0xd03)

*************************************************************************

We are getting proper voltage on LPDDR4 rails and power sequence is also proper.

Please help us to identify that why are we getting Invalid Target and how we can resolve it.

[sahilnayak]

Thanks Igor for your quick response.

We will verify the checks suggested by you.

[igorpadykov]

Hi sahilnayak

for "Invalid Target" error one can check if correct part number was

selected in field "Target" of ddr test. Also it may be caused by hardware,

may be suggested to check processor voltages, use datasheet and hardware guide

for reference :

i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products

i.MX8M Hardware Developer’s Guide

Best regards
igor