LPDDR2 to i.MX6 Dual Lite

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LPDDR2 to i.MX6 Dual Lite

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Contributor II

Hello all,

I'm want to add a dual rank/dual channel LPDDR2 to an i.MX6 Dual Lite.

This thread shows a reference design: Dual-Channel LPDDR2 Routing Rules for i.MX6

Is that reference design also valid for my case? Is a layout of this reference design available?

Thank you for your help.

Regards,

Frank

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NXP TechSupport
NXP TechSupport

Yes, this design can be used as a reference for your case as well. Unfortunately, the layout file for this design is not publicly available. For the hardware design/layout recommendations, please refer to the i.MX6 Series Hardware Development Guide (IMX6DQ6SDLHDG) Rev.1 document, available on the Freescale web site:

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&fpsp=1&tab=Documentation_Tab

Especially, please refer to the Table 2-1 and Sections 3.1 to 3.6.

Note: each 32-bit LPDDR2 channel can be routed independently of each other. Bit swapping within a byte lane/channel is not allowed by LPDDR2 JEDEC spec.


Have a great day,
Artur

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NXP TechSupport
NXP TechSupport

Yes, this design can be used as a reference for your case as well. Unfortunately, the layout file for this design is not publicly available. For the hardware design/layout recommendations, please refer to the i.MX6 Series Hardware Development Guide (IMX6DQ6SDLHDG) Rev.1 document, available on the Freescale web site:

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&fpsp=1&tab=Documentation_Tab

Especially, please refer to the Table 2-1 and Sections 3.1 to 3.6.

Note: each 32-bit LPDDR2 channel can be routed independently of each other. Bit swapping within a byte lane/channel is not allowed by LPDDR2 JEDEC spec.


Have a great day,
Artur

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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