Hi chip experts,
I think there are 3 clock domains(AHB,PER&IPG) in the LCD Controller (LCDC) and all of regs are in the AHB domain.
I want to make sure the proper usage of LCDC_EN which is IPG Clock Gating[29].
(Q) Is it OK to leave LCDC_EN clear (=no ipg clock) when write regs?
Because I don't want to make any noise during startup. Can anyone help me?
Thanks.
Hello,
All clocks (AHB,PER&IPG) are necessary for LCDC operation.
Have a great day,
Yuri
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Dear Yuri,
Thank you for replying. I just want to clarify your words "LCDC operation".
Is it mean the activated period of LCD signals or registers?
If so, I agree with you that all 3 clocks are necessary. How about "no LCDC operation" preriod;
Is it OK to gate IPG clock(clear LCDC_EN) in order to suppress LCD signals after initialization done?
BR