LCD Logo is not clear in Linux Kernel-3.10.53 imx6 sololite

[himabindu]

Hi Team,

   Currently I am working on I.MX6 Sololite Linux kernel Version-3.10.53.The Frame Buffer Driver mxc_elcdif_fb.c  is not present in this kernel Version. So as per the Reference Manual i am using the mxsfb.c source file instead of  mxc_elcdif_fb.c . The Display Timings and Clock Frequency are being passed correctly as per the Datasheet. Iam able to get the Logo but in reverse and the pixels are getting overlapped. Kindly help me to resolve the issue as early as possible.

Display Timings Passed in imx6sl-evk.dts are 320*240(Hactive,Vactive), 68(HBP),20(HFP),8(VBP),2(HFP),2(Hsync_Len),1(Vsync_Len) and de-active bit as 1.

Clock Frequency is 19.5MHz

Frame Driver Source File Followed: drivers/video/mxsfb.c

Thanks  & Regards,

C.Himabindu.

[himabindu]

Hi Team,

               With LCD Backlight ON , LCD brightness as 6 and with the following display timings for IMX6SL Processor LCD is working fine.

No changes are required im mxsfb.c and lcd.c files.

Backlight related Changes in imx6sl-evk.dts :-

=======================================

 backlight {
                compatible = "fsl,pwm-backlight";
                pwms = <&pwm1    0     50000>;                 /* <pwm  pwmid  pwm_period_ns> */
                brightness-levels = <0 4 8 16 32 64 128 255>;
                default-brightness-level = <6>;  
                status ="okay";
        };

LCD Display Timgs in imx6sl-evk.dts(WVGA-SEIKO Mode) :-

=============================================

               display-timings {
                        native-mode = <&timing0>;
                        timing0: timing0 {
                                clock-frequency = <29850000>; /* 29850000 */
                                hactive = <320>;
                                vactive = <240>;
                                hback-porch = <66>; /* 100 */
                                hfront-porch = <20>; /* 80 */
                                vback-porch = <8>; /*  0 if 0 goes into Ageing mode - Will generate RGB Colours*/
                                vfront-porch = <2>; /*  0 */
                                hsync-len = <2>;
                                vsync-len = <1>;
                                hsync-active = <0>;
                                vsync-active = <0>;
                                de-active = <0>;
                                pixelclk-active = <1>;
                        };

                };

Thanks & Regards,

C.Himabindu.

[Bio_TICFSL]

Hi HIMA

The HSYNC, VSYNC, Pixel clock polarity was set the register IPU_DI_GENERAL; the DE and data line polarity was set in register IPU_DI_POL.

You should try to change lcd_panel_info_t with custom lcd parameters.

regards