I am using pin GPIO_AD_11 as GPIO25 to connect to a pin of another chip. The pin on the other chip is required to be pulled up but according to the Hardware Development Guide, GPIO_AD_11 needs to be externally pulled down for JTAG_MOD, which is the ALT7 muxing mode for GPIO_AD_11.
The Reference Manual says, "The ALT7 and ALT6 extended muxing modes allow any signal in the system (such as fuse, pad input, JTAG, or software register) to override any software configuration and to force the ALT6/ALT7 muxing mode." I am not quite sure when the JTAG_MOD signal overrides the GPIO signal I have set for the GPIO_AD_11 pad, but I would guess it happens on reset?
My question is, do I really need to externally pull GPIO_AD_11 low? I set GPIO_AD_11 to have a 22k pull up in my software and I am guessing that if the sampling of JTAG_MOD happens at reset (which occurs before my software enables this pull up), that GPIO_AD_11 will have the default 100k pull down resistor enabled when JTAG_MOD is sampled. Is the internal 100k pull down resistor enough to properly set JTAG_MOD? Or do I really need to externally pull it down for some reason.
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Hello
I hope you are well.
If SWD/JTAG is going to be used then I suggest you reserve this pin to JTAG_MOD leaving it to GND. It is needed that it is externally terminated by a PD 4.7k resistor or connecting it directly to GND.
Best regards,
Omar
Thanks for the explanation. Why does it need an external pull down? From the diagram you posted, it seems like as long is the level is low it should be fine.
By the external termination, we ensure that the pin stays in that state even in noisy environments.
You can connect the pin directly to GND without the need of an external resistor.
Best regards,
Omar
Ok that makes sense
Hello
I hope you are well.
If SWD/JTAG is going to be used then I suggest you reserve this pin to JTAG_MOD leaving it to GND. It is needed that it is externally terminated by a PD 4.7k resistor or connecting it directly to GND.
Best regards,
Omar