Hi all,
I tried data transfer from FPGA to DDR3 which is connected to i.MX6Q via PCIe I/F as attached file.
However, it was failed with some reason.
Then, I guess this transfer was prevented by i.MX6Q since i.MX6Q don't allow read / write to DDR3 by FPGA via PCIe.
So could you let me know whether there is some setting to allow read / write access from PCIe to DDR3?
And if there is the setting, could you let me know how to change it?
Best Regards,
Satoshi Shimoda
Solved! Go to Solution.
If imx6q worked as Endpoint mode, we need to configure imx6 Pcie BAR(write your special address to pcie bar register for address match) to support system memory access from root complex, aligned to PCIe spec.
If imx6q worked as Endpoint mode, we need to configure imx6 Pcie BAR(write your special address to pcie bar register for address match) to support system memory access from root complex, aligned to PCIe spec.