According to the reference manual for the i.MX6D/Q, the EIM clock ("ACLK") is a max. of 133 MHz. After I read the section on the clock control module, it is not clear how this frequency is generated from the PLLs with an integer divide. I have also seen this clock frequency given as 132 MHz. And, I have seen 133 MHz given as the max. frequency and the default frequency.
I have found the i.MX35 clock tree tool in the community. Does that also apply to the i.MX6?
Mostly, I need to know if the EIM clock is truly 133 MHz by default and, how to change it. This is necessary to calculate board level timing using the i.MX6 data sheet. I am hoping the clock tree tool will help with that.
You may try the next intersting solution :
There are 2 ways to check the clock tree under linux BSP:
Copy the output to a file(imx6q_clk.dot) then use the dot command from graphviz to generate the picture:
dot imx6q_clk.dot -Tpng -o imx6q_clk.png
Here is an example of imx6q_clk.png