Is the SCU and M4 sharing the same UART in IMX8QXP

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Is the SCU and M4 sharing the same UART in IMX8QXP

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_asif_muhammed_
Contributor III

Hi ,

Can someone please confirm whether the UART0 of M4 core in i.MX8X is shared/used by the SCU for showing debug prints by default?

I came across this in the board.c file of mek board in the SCFW porting kit (L6.1.36_2.1.0_SCFWKIT-1.15.0).

sc_pm_clock_rate_t rate = SC_24MHZ;
static sc_bool_t banner = SC_FALSE;
/* Configure pads */
pad_force_mux(SC_P_ADC_IN2, 1, SC_PAD_CONFIG_NORMAL,
SC_PAD_ISO_OFF);
pad_force_mux(SC_P_ADC_IN3, 1, SC_PAD_CONFIG_NORMAL,
SC_PAD_ISO_OFF);

/* Power and enable clock */
pm_force_resource_power_mode_v(SC_R_SC_PID0,
SC_PM_PW_MODE_ON);
pm_force_resource_power_mode_v(SC_R_DBLOGIC,
SC_PM_PW_MODE_ON);
pm_force_resource_power_mode_v(SC_R_DB, SC_PM_PW_MODE_ON);
pm_force_resource_power_mode_v(SC_R_M4_0_UART,
SC_PM_PW_MODE_ON);
(void) pm_set_clock_rate(SC_PT, SC_R_M4_0_UART, SC_PM_CLK_PER,
&rate);
(void) pm_clock_enable(SC_PT, SC_R_M4_0_UART, SC_PM_CLK_PER,
SC_TRUE, SC_FALSE);

/* Configure UART */
main_config_debug_uart(LPUART_DEBUG, rate);

From the reference manual(IMX8DQXPRM), I saw that ADC_IN3 pin has only the following muxes and no scu_uart_tx.

_asif_muhammed__0-1702893566424.png

Similar mux values are present for ADC_IN2 as well. 

The muxing is set for M40_UART0_TX and M40_UART0_RX.

Any help will be deeply appreciated.

 @igorpadykov @AldoG 

 

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AldoG
NXP TechSupport
NXP TechSupport

Hello,

Yes, you are correct, the MEK has two serial ports, the first one (usually ttyUSB0) is used by the A cores (Uboot/Linux), the second one is used by one of the M4 cores OR the SCFW.

Saludos,
Aldo.

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AldoG
NXP TechSupport
NXP TechSupport

Hello,

Yes, you are correct, the MEK has two serial ports, the first one (usually ttyUSB0) is used by the A cores (Uboot/Linux), the second one is used by one of the M4 cores OR the SCFW.

Saludos,
Aldo.

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_asif_muhammed_
Contributor III

Thank You @AldoG for the quick reply. 

 

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