Is LVDS0_CLK_P/N and LVDS1_CLK_P/N same timing signals?

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Is LVDS0_CLK_P/N and LVDS1_CLK_P/N same timing signals?

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takashitakahash
Contributor III

Hi community.

The split channel output (one input source, splitted to 2 channels on output) Table 39-5.

Channel Mapping Split Channel DI0 setting function, LVDS0_CLK_P/N and LVDS1_CLK_P/N, Are there output signal   same timing clock signals?

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igorpadykov
NXP Employee
NXP Employee

Hi Takashi

both channels use common clock as reference, however datasheet

does not provide timings data between channels.

In split channel mode one input source is splitted to 2 channels on output,

dual channel lvds lcd (even pixels in one channel, odd for other) should be used.

Best regards

igor

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435件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Takashi

both channels use common clock as reference, however datasheet

does not provide timings data between channels.

In split channel mode one input source is splitted to 2 channels on output,

dual channel lvds lcd (even pixels in one channel, odd for other) should be used.

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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