Hi, I would like to confirm if my understanding is correct or not.
At 15.3.2.5 DTG Interlaced Video Timing Generator in MX8MDQLQRM,
"The DTG supports interlaced timing generation.".
Is this mean EVK can output 1920x1080 59.94i signal from HDMI?
Because there is no "Interlaced signal timing table" on 15.3.2.7 DTG Timing Standards.
And there is an topic about Interlaced video output at https://community.nxp.com/thread/477269.
The answer is "The i.MX8 do not support interlace."
So, I am confusing which is the correct.
1. i.mx8m EVK have capability to output 1920x1080 59.94i from HDMI, but sample software does not support this mode.
2. i.mx8m does not support 1920x1080 59.94i from HDMI. The explanation of 15.3.2.5 is not about interlaced video output from HDMI.
Please help.
Solved! Go to Solution.
Hi Y
as stated in sect.13.4.1 Overview i.MX8MDQ Reference Manual
The protocols supported by the controller are: ..• CEA-861-F..
https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf
Extended Display Identification Data - Wikipedia
which includes some interlaced formats. However NXP i.MX8M BSPs do not support it.
Best regards
igor
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Hi Y
as stated in sect.13.4.1 Overview i.MX8MDQ Reference Manual
The protocols supported by the controller are: ..• CEA-861-F..
https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf
Extended Display Identification Data - Wikipedia
which includes some interlaced formats. However NXP i.MX8M BSPs do not support it.
Best regards
igor
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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