Interfacing a FPGA to CSI1 port of iMX6Q

[sumeetdube]

We are currently working on a custom design using the freescale iMX6Q processor for video processing.

We have a adv7180 decoder connected to the CSI0 port of imx and using the adv7180 driver

and we can access video data using the /dev/video0 node created by the driver.

Now we want to connect a FPGA directly to CSI1 port of imx. All data lines and vsync,hsync and pixclk signals will be mapped to FPGA lines.

In short the FPGA will generate data just as a adv7180 decoder would.(we have space constraints so we cannot have 2 adv7180 decoders).

Now my question is that how do we access this data, as there will be  no /dev/video1 node created as there is no decoder in between .

Will i have to write a driver for this like the adv7180 decoder or is there any other method. Also how do we get rid of the i2c probing in the adv7180 ?

[weidong_sun · Accepted solution]

Hello Dube,

      We also don't have corresponding reference for you, but I have some suggestions for you.

      We can regard FPGA connected to CSI port as a device to be simulated as ADV7180, for linux system, any device must have a device driver, so it is neccessary for you to design a linux driver for the logic IP based on FPGA, this is unavoidable.

      As for I2C, for hardware, we only need 2 GPIO pins from CPU to FPGA, I2C logic for FPGA is also not difficult.

Hope above suggestion can help you !

Regards,

weidong

[sumeetdube]

Yes you are right.. writing a driver is unavoidable.

On the Contrary, can we do this (just curious):

Assuming that we do not use CSI0 and make changes according to CSI1 in  the adv7180 driver

and connect the CSI1 lines to the FPGA. So when the adv7180 driver is probed i2c won't cause any problems,

it will still get adv7180 and create a node like /dev/video0, but data will be available on CSI1 from FPGA? Is it possible?

I am just asking out of curiosity!!.