Interfacing OV7251 single lane MIPI sensor with iMX6

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Interfacing OV7251 single lane MIPI sensor with iMX6

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tamilarasane
Contributor III

Hi,

I am trying to interface the single lane MIPI sensor OV7251 sensor with imx6.

MIPI_CSI_PHY_STATE register value is continuously changing between 0x0000_0300 and 0x0000_0310. MIPI_CSI_ERR1 and MIPI_CSI_ERR2 status registers are also zero. But Frames are not coming to memory. please let me know if any body faced this issue?

If i probed the MIPI clock and MIPI data lines from sensor , it is toggling 

Settings at imx6 side:

 MIPI D-PHY clock  =  0x2a ( 330 to 360 Mhz)

IPU0, CSI1,  Virtual channel 0

Data type =0x2A

settings at sensor side

sensor's MIPI Clock lane frequency = 112MhZ

MIPI Data type =  0x 2A

Resolution : 640 x 480

Frames : 30fps

Q1. Is the above status registers denotes iMX6 receiving MIPI packets or not? . Since check sum error also zero.

Q2 .How should I know weather iMX6 received MIPI packets or not? 

Q3. we have configured single lane in imx6 dts file. Is there other things need to configure at imx6 side for single lane? Q4. anybody interfaced 0V7251 single lane MIPI with imx6?

Thanks

Ta##@milarasan

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lukasmeier
Contributor I

Dear Tamilarasan

We also developed a partially working driver for the ov7251 here.

We had issues setting up the IPU to pipe the raw video data. We made it work, but at the moment we still have to post-process the data with the CPU to get a proper image (bitshifting & column flipping) which is taking up too many resources.

Could you maybe give me some hints how you handled the processing in the IPU?

This would be really helpful!

Best regards,

Lukas

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tgs
Contributor I

Hi Tamilarasan

Very nice to hear, that all works now for you. Congrats.

I am up to the exact same task to connect an OV7251 sensor to an imx6. Would be great, if you could share your knowledge, such that I do not have to reinvent the wheel.

Thanks in advance and best regards

Tonio

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tamilarasane
Contributor III

Hi Tonio,

Where you are and what is the issue you are facing?

Thanks,

Tamilarasan

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igorpadykov
NXP Employee
NXP Employee

Hi Tamilarasan

MIPI_CSI_PHY_STATE bits 8 and 9 must be 1 (0x300) and bits 4~7 will
toggle according to the moment you read the register and the state of the transmission.
In case of sabresd, as it uses only 2 lanes, this register will toggle from 0x300 to 0x330.
Data type =  0x 2A  means raw data one can look for such data type cameras at
https://community.nxp.com/thread/320618
https://community.nxp.com/message/344529#344529

Best regards
igor
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tamilarasane
Contributor III

Hi,

Thank you.  it is worked now 

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mablabs
Contributor I

Hi @tamilarasane ,

I'm also looking to interface a OV7251 camera to work with an iMX6, using a 5.4.84 kernel. I ported over the standard subdevice based driver in the kernel to be a V4L2 internal device, and am seeing the MIPI DPHY STATE register toggle from 0x300 and 0x310 and am not seeing any errors reported on the CSI bus, but am not receiving any frames to the IPU. Can you provide any recommendations on next steps?

Any help is appreciated.

Best,

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