Inquiry SGTL5000 external VDDD software setting on i.MX6DL platform

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Inquiry SGTL5000 external VDDD software setting on i.MX6DL platform

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andychien
Contributor III

Dear Sir,

 

Our customer used SGTL5000 on i.MX6DL platform, but some question below.

1. SGTL5000 suggest to use VDDD on new design, but NXP BSP SGTL5000  (sgtl5000.c) setting is some difference         VS. programming example  on datasheet page 26.

 

2. By Datasheet Page 26

    If customer use external VDDD power and enable  VDDD internal linear regulator, what is occur on SGTL5000 chip (       no programming or damage)

     

//--------------- Power Supply Configuration----------------
// NOTE: This next 2 Write calls is needed ONLY if VDDD is
// internally driven by the chip
// Configure VDDD level to 1.2V (bits 3:0)
Write CHIP_LINREG_CTRL 0x0008
// Power up internal linear regulator (Set bit 9)
Write CHIP_ANA_POWER 0x7260
// NOTE: This next Write call is needed ONLY if VDDD is
// externally driven
// Turn off startup power supplies to save power (Clear bit 12 and 13)
Write CHIP_ANA_POWER 0x4260

 

3. By use external VDDD power in, software only write CHIP_ANA_POWER 0x4260 is OK, right?

 

4.  Provide customer dump SGTL5000 registers (sgtl5000_register_dump.txt) 

    Could you help check and provide some comments?

Thanks a lot, 

Original Attachment has been moved to: sgtl5000_register_dump.txt.zip

Original Attachment has been moved to: sgtl5000.c.zip

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Andy

as suggests SGTL5000 Silicon Errata bit 9 also may be cleared (with CHIP_ANA_POWER 0x4060)
http://www.nxp.com/docs/en/errata/SGTL5000ER.pdf
dump registers depends on use case, please check various programming examples provided in

AN3663 SGTL5000 Initialization and Programming
http://www.nxp.com/docs/en/application-note/AN3663.pdf

Best regards
igor
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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Andy

as suggests SGTL5000 Silicon Errata bit 9 also may be cleared (with CHIP_ANA_POWER 0x4060)
http://www.nxp.com/docs/en/errata/SGTL5000ER.pdf
dump registers depends on use case, please check various programming examples provided in

AN3663 SGTL5000 Initialization and Programming
http://www.nxp.com/docs/en/application-note/AN3663.pdf

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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andychien
Contributor III

Dear Sir,

 

Thanks a lot for good information

On you provide documents about setting register value of CHIP_ANA_POWER

It is CHIP_ANA_POWER=0x4060 on SGTL5000ER.pdf

It is CHIP_ANA_POWER=0x4260 on AN3663.pdf

It is CHIP_ANA_POWER=0x5260 on Customer's dump value

 

You mean CHIP_ANA_POWER=0x4060, right???

 

If customer setting CHIP_ANA_POWER=0x5260 (external power= on and internal linear regulator=on),

SGTL5000 is damage or nothing?

 (Customer MP have 2 chip damage, fail rate 2/500=0.4%)

They will hope to know this root cause isn't correct for value of SGTL5000 initial power or other.

Thanks , 

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Andy

according to SGTL5000 Silicon Errata these changes for settings

are only for reducing power consumption. One can left these bits unchanged

(or any combination of them), they do not affect fail rate and chip will not damage.

Best regards
igor

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