Imx93 GPIO interrupt

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Imx93 GPIO interrupt

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frebourg
Contributor II

How to use GPIO interrupt on kernel driver (on linux 6.6)

Is somebody  can share sample code of linux driver using interrupt on GPIO

Technical Department | Development Engineer
Einea | Z.I. rue Lavoisier, 76260 Eu
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Manuel_Salas
NXP TechSupport
NXP TechSupport

Hello @frebourg 

I hope you are doing well.

Unfortunately this is difficult to achieve, it is preferable to assing resources to be used from Cortex A and from Cortex M.

Maybe you can make an application for Cortex M and communicate the cores in RPMSG.

You can take a look to this post as started point:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/GPIOs-Interrupt-i-MX93-M33/ta-p/1909424

 

I hope this information can helps to you.

 

Best regards,

Salas.

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frebourg
Contributor II

Adding current driver source and dts. 

gpio_interrupt  declared in /proc/interrupts

root@board:~# cat /proc/interrupts
           CPU0       CPU1
 13:      36966      43746     GICv3  26 Level     arch_timer
 14:      11423      14496     GICv3 106 Level     timer@44290000
...
 96:          0          0     GICv3  98 Level     42560000.spi
 99:       7450          0     GICv3 119 Level     mmc1
100:          0          0  gpio-vf610   0 Edge      42860000.mmc cd
101:          0          0  gpio-vf610  10 Edge      gpio_interrupt
...
Err:          0


in /sys/kernel/debug/gpio ,  GPIO sees OK . 

root@board:~# cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 512-543, parent: platform/43810000.gpio, 43810000.gpio:
..
 gpio-522 (IRQ_AEMPTY          |gpio_interrupt      ) in  hi IRQ
 gpio-523 (IRQ_AFULL           )
..


Everithing seems ok,  Checked GPIO change with scope.   But no interrupt detected .

Any idea  ? 




Technical Department | Development Engineer
Einea | Z.I. rue Lavoisier, 76260 Eu
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frebourg
Contributor II

Interrupt is ok  if cortex-M not started.

Is it possible to have interruption on Cortex-A and Cortex-M  on the same GPIO (GPIO2) ?

Technical Department | Development Engineer
Einea | Z.I. rue Lavoisier, 76260 Eu
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Manuel_Salas
NXP TechSupport
NXP TechSupport

Hello @frebourg 

I hope you are doing well.

Unfortunately this is difficult to achieve, it is preferable to assing resources to be used from Cortex A and from Cortex M.

Maybe you can make an application for Cortex M and communicate the cores in RPMSG.

You can take a look to this post as started point:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/GPIOs-Interrupt-i-MX93-M33/ta-p/1909424

 

I hope this information can helps to you.

 

Best regards,

Salas.

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