Hi Team,
Currently am working on imx7s processor running at 800MHz.
I have written GPIO as interrupt kernel module. The module has successfully loaded and able to see the irq number in /proc/interrupts
Irq handler also hitting both RISING and FALLING edge.
RISING EDGE latency time takes 10 to 20us but FALLING EDGE time takes more 400 to 500us. May I know why falling edge time takes more time.
In the irq handler based on input setting the GPIO pin (RISING)HIGH or (FALLING) LOW.
Could you please let me know why falling edge time is more.
Thanks in advance.
Thanks,
Ram
Hi Jimmy,
Thank you for your reply.
1. request_irq function IRQF_TRIGGER_FALLING flag has configured. When ever falling edge triggered am setting the another GPIO ON in irq handler. The GPIO ON time is not matching with the input falling edge. When falling edge triggered it takes 400 to 500us to turn on GPIO in irq handler function.
2. BSP version 3.0.2
3. Logic analyser one channel connected to input and channel 2 connected to output of the gpio.
Please let me know what is the latency time of RISING and FALLING edges.
Thanks,
Ram