Imx6ul spi clock interval

[jieh朱]

Hello！

   I am using imx6ul

   The kernel version is linux4.1.15

   I configured the device tree and kernel and tested it with Documentation/spi/spidev_test.c

   However, I set up an 8-bit transfer. After the clock has finished transmitting the 8-bit byte, there will be a time interval and then the clock will be sent. As shown below, I should modify it there to modify the size of the interval.

[igorpadykov]

Hi jiehuai

I am afraid it is not possible to decrease time interval, as it is caused

by processor internal bus delays. For improving throughput one can increase

BURST_LENGTH parameter in ECSPIx_CONREG register or try with/or without

sdma:

                ecspi1: ecspi@02008000 {..
                    dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
                    dma-names = "rx", "tx";

imx6ul.dtsi\dts\boot\arm\arch - linux-imx - i.MX Linux kernel 

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[jieh朱]

Thank you for your reply
   I use dma transfer or pio transfer, it will have the above problem
   How should ECSPIx_CONREG register be configured?
   I saw it in IMX6ULRM
   Is it possible to configure this register?

   

      How to configure if I can. I didn't find the location of this register in the kernel.
Thank you

[igorpadykov]

linux driver does not use it, so it is in reset state, so seems there is no

way to decrease it more.

Best regards
igor

[dahyunkim]

jieh朱‌

Hello, 

I had a same problem in imx6qdl and I have to reduce the interval of the spi clock.(actually, I have to get no interval in spi clock)

I am wondering the way can modify the interval of the spi clock.

Is the interval time related in Clock Controller Module? 

[jieh朱]

Thank you for your reply

   Can I modify the interval of the spi clock? Or is the interval time cpu design can not be modified?