Imx28 GPIO gate keeper

[Fquattro]

Hello

I'm involved in a new imx28 hardware design .

I need information about status of GPIO pin when the reset is active and immediately after , when the reset is released .

Reading IMX28 data sheet reference manuale , I found the following information :

  9.2.1 Reset Configuration

Out of reset (hardware/software reset), all the pins (except JTAG related) are

configured as GPIO inputs with gate keepers enabled.

So I need to know :

1) When the reset pin is active (that is : RESET = LOW) are the GPIO pins input (high impedance) or the gate keeper is already enabled ?

2) I need information about structure of gate keeper ; gate keeper sink/source current or is high impedance  circuit ?

Gate keeper looks like as a weak pull up or weak pull down but it si not very clear  ! In the case that the GPIO pin

is connected  to drive a mosfet gate for a led activation , wihich is the logic level present on the GPIO pin when gate

keeper is enabled ?

Thanks in advance

[arthur_lai · Accepted solution]

The GPIO pins will revert to input will gate keeper enabled once a valid reset is detected.

In your application, it is suggested to use an external pull-up or pull-down on the pin to make sure the pin for driving the fet is in a correct state out of reset.