Implementing software for Cypress S71 Combo Multi-Chip

[dsonderer]

Hi,

I'm currently working on the flexspi interface between an I.mx RT1052 and a hyperbus combo device (Infineon S71 - 1,8V - 512Mb HyperFLASH, 64Mb HyperRAM). The board was originally equipped with a hyperFLASH, but was modified to accept a combo chip.

Unfortunately, I can't figure out how to make the chip function correctly. I can access and boot from the hyperflash, but was wondering how to Read/Write in the HyperRAM.

What are the setup steps for the combo chips? Which files do I have to alter to switch from a simple hyperFLASH chip to the combo?

Also, is there an application note somewhere concerning implementation of the MCPs?

Thanks in advance

[Omar_Anguiano]

Hello
I hope you are well.

From my understanding, the device connected to RT1050 is an IC that contains HyperFlash and HyperRAM correct?
If both memories are connected to the same FlexSPI interface then there are issues when you access both devices at the same time.
To avoid this, I suggest you execute the code in the internal RAM so the XIP in Flash does not collide with HyperRAM.

These application notes might be helpful:
How to Enable HyperRAM with i.MX RT (nxp.com)
Advanced HyperRAM/PSRAM Usage on i.MX RT (nxp.com)

Best regards,
Omar