If using GPIO as CS in SPI what is the configuration of config flag(i.MX RT1064)

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If using GPIO as CS in SPI what is the configuration of config flag(i.MX RT1064)

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AJ369
Contributor I

Hi,

 

I have 5 spi slave that working on SPI1. 3 cs line used as PCS1 to PCS3 and remaining 2 are GPIO.

 

Function used for SPI:- LPSPI_MasterTransferNonBlocking();

 

for PCS1 to PCS3 i can use below enum to configure the config flag 

kLPSPI_MasterPcs0 = 0U << LPSPI_MASTER_PCS_SHIFT, /*!< LPSPI master transfer use PCS0 signal */
kLPSPI_MasterPcs1 = 1U << LPSPI_MASTER_PCS_SHIFT, /*!< LPSPI master transfer use PCS1 signal */
kLPSPI_MasterPcs2 = 2U << LPSPI_MASTER_PCS_SHIFT, /*!< LPSPI master transfer use PCS2 signal */
kLPSPI_MasterPcs3 = 3U << LPSPI_MASTER_PCS_SHIFT, /*!< LPSPI master transfer use PCS3 signal */

config flag details:-

typedef struct _lpspi_transfer
{
uint8_t *txData; /*!< Send buffer. */
uint8_t *rxData; /*!< Receive buffer. */
volatile size_t dataSize; /*!< Transfer bytes. */

uint32_t configFlags; /*!< Transfer transfer configuration flags. Set from _lpspi_transfer_config_flag_for_master if
the transfer is used for master or _lpspi_transfer_config_flag_for_slave enumeration if the
transfer is used for slave.*/
} lpspi_transfer_t;

 

In the case of GPIO what is the configuration for above config flag. Kindly support me on this issue.

 

 

Thanks!

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Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @AJ369,

It seems what you're trying to implement is 2 new CS with GPIO pins, is that correct? 
In that case, you will need to revise the memory in the register, and the way the functions check for these flags, as it is only designed for 4 CS. You will need to implement 1 or 2 more in the enum and modify the functions to work with these new implementations.

Best regards, Julian

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AJ369
Contributor I

Hi,

Thanks for reply. You are right I am trying to add 2 new cs with GPIO pins.

Can you please elaborate about this revise the memory register and function check for flags? 

 

 

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Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @AJ369,

In order to recreate the CS pins, you will have to add these two new pins in the initialization. You will need to check in which functions you might need to add these pins for the transfers to work (like Transmit Command, Master and Slave initialization, etc) and check the bits for the registers you will be adding these pins. This is purely implementation by your part, as the driver does not support more than 4 CS.

Best regards, Julian

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