IMXRT1050-EVK: Ethernet clock to PHY

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IMXRT1050-EVK: Ethernet clock to PHY

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ulipe
Contributor II

Hello,

After setup my development environment with success on imxrt1050 evk, I started to port the tcp/ip (picoTCP) to my project, so write the enet driver was required, and I got the phy<->processor MII (MDIO/MDC) communication working and now I'm able to configure it. But when I read the link status register, even with cable connected it never report the link was up.

Loooking deeper on hardware ( in EVK schematic) I noted the phy XI pin (clock input) receives it from ENET_TX_CLK signal from processor, measuring with the oscilloscope I found no clock in this pin. Given this my question is, what is the correct ENET configuration to provide clock to enet phy in IMXRT1050-EVK?

Thank you in advance.

Felipe

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art
NXP Employee
NXP Employee

Also, as the reference, you can use the enet driver code, included in the MCUXpresso SDK package, available for download on the processor's Software&Tools web page:

https://www.nxp.com/products/processors-and-microcontrollers/applications-processors/i.mx-applicatio...


Have a great day,
Artur

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ulipe
Contributor II

3 days and no response useful response (again).


So I solved the problem, after configuring ENET PLL as stated on reference manual, and set the IOMUX to redirect the generated clock to the phy, now I able the 50MHz clock to use in RMII mode and got the phy fully working, to help others with same question, follow the code snippet below before configure the ethernet:

const clock_enet_pll_config_t config = { .enableClkOutput0 = true, .enableClkOutput1 = false, .enableClkOutput2 = false, .loopDivider0 = 0x01, .loopDivider1 = 0x01 };

/* configure ethernet pin_muxing and clocking*/

CLOCK_InitEnetPll(&config);

IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, true);

BOARD_InitENET();

Best.

Felipe

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