IMX93 with WM8962 without SAI MCLK

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

IMX93 with WM8962 without SAI MCLK

445 Views
baguiam
Contributor I

Hello All,

I’m currently facing difficulties getting IMX93 working with WM8962 codec.

We are working in BareMetal ThreadX application, and I’m using the fsl_wm8962 driver directly. Currently our hardware has a SAI_MCLK line being generated externally by oscillator.

Given this last detail, I’m not sure what is the right SAI and wm8962 configuration, for this scenario.

Below I will share one of testing configuration not working.

 

Pinmux Configuration:

static void SAI1_InitPins(void)

{

    IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_TXD0__SAI1_TX_DATA00, 0U);

    IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_TXD0__SAI1_TX_DATA00,

        IOMUXC_PAD_DSE(15U));

 

    IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_RXD0__SAI1_RX_DATA00, 0U);

    IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_RXD0__SAI1_RX_DATA00,

         IOMUXC_PAD_DSE(15U));

 

    IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_TXC__SAI1_TX_BCLK, 0U);

    IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_TXC__SAI1_TX_BCLK,

        IOMUXC_PAD_DSE(15U));

 

    IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_TXFS__SAI1_TX_SYNC, 0U);

    IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_TXFS__SAI1_TX_SYNC,

        IOMUXC_PAD_DSE(15U));

       

    /* MCLK is generated by external oscilator */

/*   IOMUXC_SetPinMux(IOMUXC_PAD_UART2_RXD__SAI1_MCLK, 0U);

    IOMUXC_SetPinConfig(IOMUXC_PAD_UART2_RXD__SAI1_MCLK,

        IOMUXC_PAD_DSE(15U)); */

}

 

Board Configuration:

static void BOARD_AudioClockSetup(void)

{

/*

 * AUDIOPLL1/AUDIOPLL1OUT

 *

 * VCO = (24MHz / rdiv) * (mfi + (mfn / mfd))  = 3,932,160,000 Hz

 * Output = VCO / odiv = 393.216 MHz

 */

    const fracn_pll_init_t g_audioPllCfg = {

        .rdiv = 1,

        .mfi = 163,

        .mfn = 84,

        .mfd = 100,

        .odiv = 10

    };

 

    /* clang-format off */

    const clock_root_config_t lpi2cClkCfg = {

        .clockOff = false,

  .mux = 0, // 24MHz oscillator source

  .div = 1

    };

 

    const clock_root_config_t saiClkCfg = {

        .clockOff = false,

        .mux = 1, // select audiopll1out source(393216000 Hz)

        .div = 32 // output 12288000 Hz

        //.div = 16 // output 24576000 Hz

    };

 

    /* 250MHz DMA clock */

    const clock_root_config_t dmaClkCfg = {

        .clockOff = false,

        .mux = kCLOCK_WAKEUPAXI_ClockRoot_MuxSysPll1Pfd0, // 1000MHz // For edma3 this is different ?

        .div = 4

    };

 

    // Not Needed, external 24MHz

    sai_master_clock_t saiMasterCfg = {

        .mclkOutputEnable = false,

     };

    /* clang-format on */

 

    /* ROM has already initialized PLL */

    CLOCK_PllInit(AUDIOPLL, &g_audioPllCfg);

   

    /*I2C */

    CLOCK_SetRootClock(kCLOCK_Root_Lpi2c2, &lpi2cClkCfg);

    CLOCK_EnableClock(kCLOCK_Lpi2c2);

 

    /* SAI1 Clock Config */

    CLOCK_SetRootClock(kCLOCK_Root_Sai1, &saiClkCfg);

    CLOCK_EnableClock(kCLOCK_Sai1);

   

    /* Edma Clock Config */

    CLOCK_SetRootClock(kCLOCK_Root_WakeupAxi, &dmaClkCfg); // Check this

    CLOCK_EnableClock(kCLOCK_Edma1);

 

    //saiMasterCfg.mclkSourceClkHz = CLOCK_GetIpFreq(kCLOCK_Root_Sai1);            /* setup source clock for MCLK */

    //saiMasterCfg.mclkHz          = 24000000U;                 /* setup target clock of MCLK */

    SAI_SetMasterClockConfig(SAI1, &saiMasterCfg);

}

 

Init SAI:

void InitAudio_SAI(void)

{

    /* SAI init */

    SAI_Init(SAI1);

    SAI_TransferTxCreateHandle(SAI1, &txHandle, SAI_callback, NULL);

    /* I2S mode configurations */

    SAI_GetClassicI2SConfig(&saiConfig, kSAI_WordWidth16bits, kSAI_Stereo, kSAI_Channel0Mask);

    saiConfig.syncMode    = kSAI_ModeAsync;

    saiConfig.masterSlave = kSAI_Slave;

    SAI_TransferTxSetConfig(SAI1, &txHandle, &saiConfig);

 

    /* set bit clock divider */

    SAI_TxSetBitClockRate(SAI1, 12288000U, kSAI_SampleRate16KHz, kSAI_WordWidth16bits, 2U);

 

    intCtrlHandlerRegister(SAI1_IRQn,(void*)SAI1_DriverIRQHandler,OS_IRQ_PRIO_MAX);

    EnableIRQ(SAI1_IRQn);

}

 

Init Codec and Config:

static wm8962_config_t wm8962Config_16 = {

    .i2cConfig = {.codecI2CInstance = BOARD_CODEC_I2C_INSTANCE},

    .route =

        {

        .enableLoopBack = false,

        .leftInputPGASource   = kWM8962_InputPGASourceInput1,

        .rightInputPGASource  = kWM8962_InputPGASourceInput1,

        .leftInputMixerSource = kWM8962_InputMixerSourceInputPGA,

        .rightInputMixerSource = kWM8962_InputMixerSourceInputPGA,

        .leftSpeakerPGASource   = kWM8962_OutputPGASourceDAC,

        .rightSpeakerPGASource  = kWM8962_OutputPGASourceDAC,

        .leftSpeakerMixerSource = kWM8962_OutputMixerSourceLeftDAC,

        .rightSpeakerMixerSource = kWM8962_OutputMixerSourceRightDAC,

        .leftHeadphonePGASource   = kWM8962_OutputPGASourceDAC,

        .rightHeadphonePGASource  = kWM8962_OutputPGASourceDAC,

        .leftHeadphoneMixerSource = kWM8962_OutputMixerSourceLeftDAC,

        .rightHeadphoneMixerSource = kWM8962_OutputMixerSourceRightDAC

        },

    .slaveAddress = WM8962_I2C_ADDR,

    .bus          = kWM8962_BusI2S,

    .format       = {.sampleRate = kWM8962_AudioSampleRate16KHz, .bitWidth = kWM8962_AudioBitWidth16bit},

    .fllClock =

        {

            .fllClockSource        = kWM8962_FLLClkSourceMCLK,

            .fllReferenceClockFreq = 24000000U,

            .fllOutputFreq         = 12288000U,

        },

    //.sysclkSource = kWM8962_SysClkSourceMclk, /* use MCLK pin as sysclk's source */

    .sysclkSource = kWM8962_SysClkSourceFLL,

    /* sai running as master mode, so codec running as master just have PLL config by codec driver */

    .masterSlave  = true,

};

 

status_t Init_Codec(void)

{

    wm8962Config_16.i2cConfig.codecI2CSourceClock = CLOCK_GetIpFreq(kCLOCK_Root_Lpi2c2);

    wm8962Config_16.format.mclk_HZ                = 24000000U;

    status_t result = WM8962_Init(&codecHandle,&wm8962Config_16);

 

    if (result != kStatus_Success) {

        /* Handle initialization error */

        arm64_lowputs("Error Initializing WM8962!\r\n");

        return result;

    }

    else

    {

        arm64_lowputs("WM8962_Init Successfull!\r\n");

    }

 

    #if(1)

    // Now configure as slave for actual operation

    WM8962_ModifyReg(&codecHandle, WM8962_IFACE0, 1U << 6U, 0U << 6U);  // Clear MS bit (slave mode)

   

    arm64_lowputs("WM8962_Init Successful with FLL in slave mode!\r\n");

    #endif

 

PlaySound:

    /*  xfer structure */

        temp          = (uint32_t)music;

        xfer.data     = (uint8_t *)temp;

        xfer.dataSize = MUSIC_LEN;

        SAI_TransferSendNonBlocking(SAI1, &txHandle, &xfer);

        /* Wait until finished */

        while (isFinished != true)

        {

            //tx_thread_sleep(1);

        }

 

        arm64_lowputs("\n\r SAI example finished!\n\r ");

 

Please if you could support with examples of such a configuration I would appreciate a lot.

0 Kudos
Reply
4 Replies

421 Views
Manuel_Salas
NXP TechSupport
NXP TechSupport

Hello @baguiam 

I hope you are doing very well.

 

Unfortunately, there are not examples, but looking at your code, there are many configurations that can be wrong and failing.

 

First:

.fllClockSource = kWM8962_FLLClkSourceMCLK

You are configuring the FLL to take MCLK as reference clock source.

According to the WM8962's Datasheet, you can select between MCLK, BCLK and Internal OSC:

Manuel_Salas_1-1761847117894.pngManuel_Salas_2-1761847140613.png

 

Then, if you're not using MCLK, SAI must be master to generate BCLK and FSYNC for the codec:

saiConfig.masterSlave = kSAI_Master;

 

And codec as slave as you did:

WM8962_IFACE0

 

Please try with those configurations.

 

If you are having more issues after those configurations, please share your schematic related to the CODEC.

 

Best regards,

Salas.

 

0 Kudos
Reply

398 Views
baguiam
Contributor I

Hello,

Thank you for answering and trying to help. It's much appreciated.

 

saiConfig.masterSlave = kSAI_Master;


Sorry that was an error of the copy-paste. i Tried a lot of variations.

So with master i can see a short period of bCLK and ADCDAT. But nothing from DACDAT with my playing sound data. Also the interrupts seems not being trigged.

 

baguiam_0-1761910143863.png

 

baguiam_1-1761910181858.png

 

 

0 Kudos
Reply

378 Views
Manuel_Salas
NXP TechSupport
NXP TechSupport

Hello @baguiam 

So, please share the project with the last updates.

Then I can check it.

 

Best regards,

Salas.

0 Kudos
Reply

317 Views
baguiam
Contributor I
That's the only error i made above.

Pinmux Configuration:

static void SAI1_InitPins(void)

{

IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_TXD0__SAI1_TX_DATA00, 0U);

IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_TXD0__SAI1_TX_DATA00,

IOMUXC_PAD_DSE(15U));



IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_RXD0__SAI1_RX_DATA00, 0U);

IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_RXD0__SAI1_RX_DATA00,

IOMUXC_PAD_DSE(15U));



IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_TXC__SAI1_TX_BCLK, 0U);

IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_TXC__SAI1_TX_BCLK,

IOMUXC_PAD_DSE(15U));



IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_TXFS__SAI1_TX_SYNC, 0U);

IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_TXFS__SAI1_TX_SYNC,

IOMUXC_PAD_DSE(15U));



/* MCLK is generated by external oscilator */

/* IOMUXC_SetPinMux(IOMUXC_PAD_UART2_RXD__SAI1_MCLK, 0U);

IOMUXC_SetPinConfig(IOMUXC_PAD_UART2_RXD__SAI1_MCLK,

IOMUXC_PAD_DSE(15U)); */

}



Board Configuration:

static void BOARD_AudioClockSetup(void)

{

/*

* AUDIOPLL1/AUDIOPLL1OUT

*

* VCO = (24MHz / rdiv) * (mfi + (mfn / mfd)) = 3,932,160,000 Hz

* Output = VCO / odiv = 393.216 MHz

*/

const fracn_pll_init_t g_audioPllCfg = {

.rdiv = 1,

.mfi = 163,

.mfn = 84,

.mfd = 100,

.odiv = 10

};



/* clang-format off */

const clock_root_config_t lpi2cClkCfg = {

.clockOff = false,

.mux = 0, // 24MHz oscillator source

.div = 1

};



const clock_root_config_t saiClkCfg = {

.clockOff = false,

.mux = 1, // select audiopll1out source(393216000 Hz)

.div = 32 // output 12288000 Hz

//.div = 16 // output 24576000 Hz

};



/* 250MHz DMA clock */

const clock_root_config_t dmaClkCfg = {

.clockOff = false,

.mux = kCLOCK_WAKEUPAXI_ClockRoot_MuxSysPll1Pfd0, // 1000MHz // For edma3 this is different ?

.div = 4

};



// Not Needed, external 24MHz

sai_master_clock_t saiMasterCfg = {

.mclkOutputEnable = false,

};

/* clang-format on */



/* ROM has already initialized PLL */

CLOCK_PllInit(AUDIOPLL, &g_audioPllCfg);



/*I2C */

CLOCK_SetRootClock(kCLOCK_Root_Lpi2c2, &lpi2cClkCfg);

CLOCK_EnableClock(kCLOCK_Lpi2c2);



/* SAI1 Clock Config */

CLOCK_SetRootClock(kCLOCK_Root_Sai1, &saiClkCfg);

CLOCK_EnableClock(kCLOCK_Sai1);



/* Edma Clock Config */

CLOCK_SetRootClock(kCLOCK_Root_WakeupAxi, &dmaClkCfg); // Check this

CLOCK_EnableClock(kCLOCK_Edma1);



//saiMasterCfg.mclkSourceClkHz = CLOCK_GetIpFreq(kCLOCK_Root_Sai1); /* setup source clock for MCLK */

//saiMasterCfg.mclkHz = 24000000U; /* setup target clock of MCLK */

SAI_SetMasterClockConfig(SAI1, &saiMasterCfg);

}



Init SAI:

void InitAudio_SAI(void)

{

/* SAI init */

SAI_Init(SAI1);

SAI_TransferTxCreateHandle(SAI1, &txHandle, SAI_callback, NULL);

/* I2S mode configurations */

SAI_GetClassicI2SConfig(&saiConfig, kSAI_WordWidth16bits, kSAI_Stereo, kSAI_Channel0Mask);

saiConfig.syncMode = kSAI_ModeAsync;

saiConfig.masterSlave = kSAI_Master;

SAI_TransferTxSetConfig(SAI1, &txHandle, &saiConfig);



/* set bit clock divider */

SAI_TxSetBitClockRate(SAI1, 12288000U, kSAI_SampleRate16KHz, kSAI_WordWidth16bits, 2U);



intCtrlHandlerRegister(SAI1_IRQn,(void*)SAI1_DriverIRQHandler,OS_IRQ_PRIO_MAX);

EnableIRQ(SAI1_IRQn);

}



Init Codec and Config:

static wm8962_config_t wm8962Config_16 = {

.i2cConfig = {.codecI2CInstance = BOARD_CODEC_I2C_INSTANCE},

.route =

{

.enableLoopBack = false,

.leftInputPGASource = kWM8962_InputPGASourceInput1,

.rightInputPGASource = kWM8962_InputPGASourceInput1,

.leftInputMixerSource = kWM8962_InputMixerSourceInputPGA,

.rightInputMixerSource = kWM8962_InputMixerSourceInputPGA,

.leftSpeakerPGASource = kWM8962_OutputPGASourceDAC,

.rightSpeakerPGASource = kWM8962_OutputPGASourceDAC,

.leftSpeakerMixerSource = kWM8962_OutputMixerSourceLeftDAC,

.rightSpeakerMixerSource = kWM8962_OutputMixerSourceRightDAC,

.leftHeadphonePGASource = kWM8962_OutputPGASourceDAC,

.rightHeadphonePGASource = kWM8962_OutputPGASourceDAC,

.leftHeadphoneMixerSource = kWM8962_OutputMixerSourceLeftDAC,

.rightHeadphoneMixerSource = kWM8962_OutputMixerSourceRightDAC

},

.slaveAddress = WM8962_I2C_ADDR,

.bus = kWM8962_BusI2S,

.format = {.sampleRate = kWM8962_AudioSampleRate16KHz, .bitWidth = kWM8962_AudioBitWidth16bit},

.fllClock =

{

.fllClockSource = kWM8962_FLLClkSourceMCLK,

.fllReferenceClockFreq = 24000000U,

.fllOutputFreq = 12288000U,

},

//.sysclkSource = kWM8962_SysClkSourceMclk, /* use MCLK pin as sysclk's source */

.sysclkSource = kWM8962_SysClkSourceFLL,

/* sai running as master mode, so codec running as master just have PLL config by codec driver */

.masterSlave = true,

};



status_t Init_Codec(void)

{

wm8962Config_16.i2cConfig.codecI2CSourceClock = CLOCK_GetIpFreq(kCLOCK_Root_Lpi2c2);

wm8962Config_16.format.mclk_HZ = 24000000U;

status_t result = WM8962_Init(&codecHandle,&wm8962Config_16);



if (result != kStatus_Success) {

/* Handle initialization error */

arm64_lowputs("Error Initializing WM8962!\r\n");

return result;

}

else

{

arm64_lowputs("WM8962_Init Successfull!\r\n");

}



#if(1)

// Now configure as slave for actual operation

WM8962_ModifyReg(&codecHandle, WM8962_IFACE0, 1U << 6U, 0U << 6U); // Clear MS bit (slave mode)



arm64_lowputs("WM8962_Init Successful with FLL in slave mode!\r\n");

#endif



PlaySound:

/* xfer structure */

temp = (uint32_t)music;

xfer.data = (uint8_t *)temp;

xfer.dataSize = MUSIC_LEN;

SAI_TransferSendNonBlocking(SAI1, &txHandle, &xfer);

/* Wait until finished */

while (isFinished != true)

{

//tx_thread_sleep(1);

}



arm64_lowputs("\n\r SAI example finished!\n\r ");
0 Kudos
Reply
%3CLINGO-SUB%20id%3D%22lingo-sub-2195977%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3EIMX93%20with%20WM8962%20without%20SAI%20MCLK%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2195977%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHello%20All%2C%3C%2FP%3E%3CP%3EI%E2%80%99m%20currently%20facing%20difficulties%20getting%20IMX93%20working%20with%20WM8962%20codec.%3C%2FP%3E%3CP%3EWe%20are%20working%20in%20BareMetal%20ThreadX%20application%2C%20and%20I%E2%80%99m%20using%20the%20fsl_wm8962%20driver%20directly.%20Currently%20our%20hardware%20has%20a%20SAI_MCLK%20line%20being%20generated%20externally%20by%20oscillator.%3C%2FP%3E%3CP%3EGiven%20this%20last%20detail%2C%20I%E2%80%99m%20not%20sure%20what%20is%20the%20right%20SAI%20and%20wm8962%20configuration%2C%20for%20this%20scenario.%3C%2FP%3E%3CP%3EBelow%20I%20will%20share%20one%20of%20testing%20configuration%20not%20working.%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%3CSTRONG%3EPinmux%20Configuration%3A%3C%2FSTRONG%3E%3C%2FP%3E%3CP%3Estatic%20void%20SAI1_InitPins(void)%3C%2FP%3E%3CP%3E%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_TXD0__SAI1_TX_DATA00%2C%200U)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_TXD0__SAI1_TX_DATA00%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20IOMUXC_PAD_DSE(15U))%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_RXD0__SAI1_RX_DATA00%2C%200U)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_RXD0__SAI1_RX_DATA00%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3BIOMUXC_PAD_DSE(15U))%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_TXC__SAI1_TX_BCLK%2C%200U)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_TXC__SAI1_TX_BCLK%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20IOMUXC_PAD_DSE(15U))%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20IOMUXC_SetPinMux(IOMUXC_PAD_SAI1_TXFS__SAI1_TX_SYNC%2C%200U)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20IOMUXC_SetPinConfig(IOMUXC_PAD_SAI1_TXFS__SAI1_TX_SYNC%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20IOMUXC_PAD_DSE(15U))%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20MCLK%20is%20generated%20by%20external%20oscilator%20*%2F%3C%2FP%3E%3CP%3E%2F*%20%26nbsp%3B%20IOMUXC_SetPinMux(IOMUXC_PAD_UART2_RXD__SAI1_MCLK%2C%200U)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20IOMUXC_SetPinConfig(IOMUXC_PAD_UART2_RXD__SAI1_MCLK%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20IOMUXC_PAD_DSE(15U))%3B%20*%2F%3C%2FP%3E%3CP%3E%7D%3C%2FP%3E%3CP%3E%3CSTRONG%3E%26nbsp%3B%3C%2FSTRONG%3E%3C%2FP%3E%3CP%3E%3CSTRONG%3EBoard%20Configuration%3A%3C%2FSTRONG%3E%3C%2FP%3E%3CP%3Estatic%20void%20BOARD_AudioClockSetup(void)%3C%2FP%3E%3CP%3E%7B%3C%2FP%3E%3CP%3E%2F*%3C%2FP%3E%3CP%3E%26nbsp%3B*%20AUDIOPLL1%2FAUDIOPLL1OUT%3C%2FP%3E%3CP%3E%26nbsp%3B*%3C%2FP%3E%3CP%3E%26nbsp%3B*%20VCO%20%3D%20(24MHz%20%2F%20rdiv)%20*%20(mfi%20%2B%20(mfn%20%2F%20mfd))%20%26nbsp%3B%3D%203%2C932%2C160%2C000%20Hz%3C%2FP%3E%3CP%3E%26nbsp%3B*%20Output%20%3D%20VCO%20%2F%20odiv%20%3D%20393.216%20MHz%3C%2FP%3E%3CP%3E%26nbsp%3B*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20const%20fracn_pll_init_t%20g_audioPllCfg%20%3D%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.rdiv%20%3D%201%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.mfi%20%3D%20163%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.mfn%20%3D%2084%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.mfd%20%3D%20100%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.odiv%20%3D%2010%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%7D%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20clang-format%20off%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20const%20clock_root_config_t%20lpi2cClkCfg%20%3D%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.clockOff%20%3D%20false%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20.mux%20%3D%200%2C%20%2F%2F%2024MHz%20oscillator%20source%3C%2FP%3E%3CP%3E%26nbsp%3B%20.div%20%3D%201%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%7D%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20const%20clock_root_config_t%20saiClkCfg%20%3D%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.clockOff%20%3D%20false%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.mux%20%3D%201%2C%20%2F%2F%20select%20audiopll1out%20source(393216000%20Hz)%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.div%20%3D%2032%20%2F%2F%20output%2012288000%20Hz%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%2F%2F.div%20%3D%2016%20%2F%2F%20output%2024576000%20Hz%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%7D%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20250MHz%20DMA%20clock%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20const%20clock_root_config_t%20dmaClkCfg%20%3D%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.clockOff%20%3D%20false%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.mux%20%3D%20kCLOCK_WAKEUPAXI_ClockRoot_MuxSysPll1Pfd0%2C%20%2F%2F%201000MHz%20%2F%2F%20For%20edma3%20this%20is%20different%20%3F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.div%20%3D%204%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%7D%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F%2F%20Not%20Needed%2C%20external%2024MHz%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20sai_master_clock_t%20saiMasterCfg%20%3D%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.mclkOutputEnable%20%3D%20false%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%7D%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20clang-format%20on%20*%2F%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20ROM%20has%20already%20initialized%20PLL%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20CLOCK_PllInit(AUDIOPLL%2C%20%26amp%3Bg_audioPllCfg)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*I2C%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20CLOCK_SetRootClock(kCLOCK_Root_Lpi2c2%2C%20%26amp%3Blpi2cClkCfg)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20CLOCK_EnableClock(kCLOCK_Lpi2c2)%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20SAI1%20Clock%20Config%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20CLOCK_SetRootClock(kCLOCK_Root_Sai1%2C%20%26amp%3BsaiClkCfg)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20CLOCK_EnableClock(kCLOCK_Sai1)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20Edma%20Clock%20Config%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20CLOCK_SetRootClock(kCLOCK_Root_WakeupAxi%2C%20%26amp%3BdmaClkCfg)%3B%20%2F%2F%20Check%20this%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20CLOCK_EnableClock(kCLOCK_Edma1)%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F%2FsaiMasterCfg.mclkSourceClkHz%20%3D%20CLOCK_GetIpFreq(kCLOCK_Root_Sai1)%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%2F*%20setup%20source%20clock%20for%20MCLK%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F%2FsaiMasterCfg.mclkHz%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%3D%2024000000U%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%2F*%20setup%20target%20clock%20of%20MCLK%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20SAI_SetMasterClockConfig(SAI1%2C%20%26amp%3BsaiMasterCfg)%3B%3C%2FP%3E%3CP%3E%7D%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%3CSTRONG%3EInit%20SAI%3A%3C%2FSTRONG%3E%3C%2FP%3E%3CP%3Evoid%20InitAudio_SAI(void)%3C%2FP%3E%3CP%3E%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20SAI%20init%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20SAI_Init(SAI1)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20SAI_TransferTxCreateHandle(SAI1%2C%20%26amp%3BtxHandle%2C%20SAI_callback%2C%20NULL)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20I2S%20mode%20configurations%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20SAI_GetClassicI2SConfig(%26amp%3BsaiConfig%2C%20kSAI_WordWidth16bits%2C%20kSAI_Stereo%2C%20kSAI_Channel0Mask)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20saiConfig.syncMode%20%26nbsp%3B%20%26nbsp%3B%3D%20kSAI_ModeAsync%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20saiConfig.masterSlave%20%3D%20kSAI_Slave%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20SAI_TransferTxSetConfig(SAI1%2C%20%26amp%3BtxHandle%2C%20%26amp%3BsaiConfig)%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20set%20bit%20clock%20divider%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20SAI_TxSetBitClockRate(SAI1%2C%2012288000U%2C%20kSAI_SampleRate16KHz%2C%20kSAI_WordWidth16bits%2C%202U)%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20intCtrlHandlerRegister(SAI1_IRQn%2C(void*)SAI1_DriverIRQHandler%2COS_IRQ_PRIO_MAX)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20EnableIRQ(SAI1_IRQn)%3B%3C%2FP%3E%3CP%3E%7D%3C%2FP%3E%3CP%3E%3CSTRONG%3E%26nbsp%3B%3C%2FSTRONG%3E%3C%2FP%3E%3CP%3E%3CSTRONG%3EInit%20Codec%20and%20Config%3A%3C%2FSTRONG%3E%3C%2FP%3E%3CP%3Estatic%20wm8962_config_t%20wm8962Config_16%20%3D%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20.i2cConfig%20%3D%20%7B.codecI2CInstance%20%3D%20BOARD_CODEC_I2C_INSTANCE%7D%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20.route%20%3D%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.enableLoopBack%20%3D%20false%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.leftInputPGASource%20%26nbsp%3B%20%3D%20kWM8962_InputPGASourceInput1%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.rightInputPGASource%20%26nbsp%3B%3D%20kWM8962_InputPGASourceInput1%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.leftInputMixerSource%20%3D%20kWM8962_InputMixerSourceInputPGA%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.rightInputMixerSource%20%3D%20kWM8962_InputMixerSourceInputPGA%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.leftSpeakerPGASource%20%26nbsp%3B%20%3D%20kWM8962_OutputPGASourceDAC%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.rightSpeakerPGASource%20%26nbsp%3B%3D%20kWM8962_OutputPGASourceDAC%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.leftSpeakerMixerSource%20%3D%20kWM8962_OutputMixerSourceLeftDAC%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.rightSpeakerMixerSource%20%3D%20kWM8962_OutputMixerSourceRightDAC%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.leftHeadphonePGASource%20%26nbsp%3B%20%3D%20kWM8962_OutputPGASourceDAC%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.rightHeadphonePGASource%20%26nbsp%3B%3D%20kWM8962_OutputPGASourceDAC%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.leftHeadphoneMixerSource%20%3D%20kWM8962_OutputMixerSourceLeftDAC%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.rightHeadphoneMixerSource%20%3D%20kWM8962_OutputMixerSourceRightDAC%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%7D%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20.slaveAddress%20%3D%20WM8962_I2C_ADDR%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20.bus%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%3D%20kWM8962_BusI2S%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20.format%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%3D%20%7B.sampleRate%20%3D%20kWM8962_AudioSampleRate16KHz%2C%20.bitWidth%20%3D%20kWM8962_AudioBitWidth16bit%7D%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20.fllClock%20%3D%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.fllClockSource%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%3D%20kWM8962_FLLClkSourceMCLK%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.fllReferenceClockFreq%20%3D%2024000000U%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20.fllOutputFreq%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%3D%2012288000U%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%7D%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F%2F.sysclkSource%20%3D%20kWM8962_SysClkSourceMclk%2C%20%2F*%20use%20MCLK%20pin%20as%20sysclk's%20source%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20.sysclkSource%20%3D%20kWM8962_SysClkSourceFLL%2C%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20sai%20running%20as%20master%20mode%2C%20so%20codec%20running%20as%20master%20just%20have%20PLL%20config%20by%20codec%20driver%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20.masterSlave%20%26nbsp%3B%3D%20true%2C%3C%2FP%3E%3CP%3E%7D%3B%3C%2FP%3E%3CP%3E%3CSTRONG%3E%26nbsp%3B%3C%2FSTRONG%3E%3C%2FP%3E%3CP%3Estatus_t%20Init_Codec(void)%3C%2FP%3E%3CP%3E%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20wm8962Config_16.i2cConfig.codecI2CSourceClock%20%3D%20CLOCK_GetIpFreq(kCLOCK_Root_Lpi2c2)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20wm8962Config_16.format.mclk_HZ%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%3D%2024000000U%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20status_t%20result%20%3D%20WM8962_Init(%26amp%3BcodecHandle%2C%26amp%3Bwm8962Config_16)%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20if%20(result%20!%3D%20kStatus_Success)%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%2F*%20Handle%20initialization%20error%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20arm64_lowputs(%22Error%20Initializing%20WM8962!%5Cr%5Cn%22)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20return%20result%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%7D%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20else%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20arm64_lowputs(%22WM8962_Init%20Successfull!%5Cr%5Cn%22)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%7D%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%23if(1)%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F%2F%20Now%20configure%20as%20slave%20for%20actual%20operation%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20WM8962_ModifyReg(%26amp%3BcodecHandle%2C%20WM8962_IFACE0%2C%201U%20%26lt%3B%26lt%3B%206U%2C%200U%20%26lt%3B%26lt%3B%206U)%3B%20%26nbsp%3B%2F%2F%20Clear%20MS%20bit%20(slave%20mode)%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20arm64_lowputs(%22WM8962_Init%20Successful%20with%20FLL%20in%20slave%20mode!%5Cr%5Cn%22)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%23endif%3C%2FP%3E%3CP%3E%3CSTRONG%3E%26nbsp%3B%3C%2FSTRONG%3E%3C%2FP%3E%3CP%3E%3CSTRONG%3EPlaySound%3A%3C%2FSTRONG%3E%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%2F*%20%26nbsp%3Bxfer%20structure%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20temp%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%3D%20(uint32_t)music%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20xfer.data%20%26nbsp%3B%20%26nbsp%3B%20%3D%20(uint8_t%20*)temp%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20xfer.dataSize%20%3D%20MUSIC_LEN%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20SAI_TransferSendNonBlocking(SAI1%2C%20%26amp%3BtxHandle%2C%20%26amp%3Bxfer)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%2F*%20Wait%20until%20finished%20*%2F%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20while%20(isFinished%20!%3D%20true)%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%7B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%2F%2Ftx_thread_sleep(1)%3B%3C%2FP%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%7D%3C%2FP%3E%3CBR%20%2F%3E%3CP%3E%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20%26nbsp%3B%20arm64_lowputs(%22%5Cn%5Cr%20SAI%20example%20finished!%5Cn%5Cr%20%22)%3B%3C%2FP%3E%3CBR%20%2F%3E%3CP%3EPlease%20if%20you%20could%20support%20with%20examples%20of%20such%20a%20configuration%20I%20would%20appreciate%20a%20lot.%3C%2FP%3E%3C%2FLINGO-BODY%3E