IMX93 u-boot for LPDDR4

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IMX93 u-boot for LPDDR4

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logan3c3
Contributor III

Hello team,
i am trying to port u-boot for a custom board with lpddr4 when i added ddr timing file and even modified spl.c by hardcoding ddr timing. The build was successful i made image into a Flash.bin file but i wasn't able to flash the file to the target board emmc the flashing fails after 19% , i checked the cable and the usb port everything is okay and working fine. Is any further changes required to be made to board specific files related to lpddr4 am i missing any steps as i have already modified Kconfig, Makefile,dts and defconfig for the same can anybody help with what i am facing??  
#IMX93evk #u-boot #spl

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Chavira
NXP TechSupport
NXP TechSupport

Hi @logan3c3!

Thank you for contacting NXP Support!

 

Do you performed the ddr stress test to your board with your timing configuration??

It is important to configure correctly the ddr memory in your board and when your board pass all the ddr stress test you should not have problems flashing or booting your board.

 

Best Regards!

Chavira

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logan3c3
Contributor III
Can you please confirm if the methods i followed are correct. can you please suggest the tool to test stress test for imx93
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Chavira
NXP TechSupport
NXP TechSupport

Hi @logan3c3!

You can use our Config Tools for i.MX Applications Processors to generate your timing file and perform the DDR tests.

 

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logan3c3
Contributor III

it passed all the stress test. but still not being able to flash the file to emmc. what might be the issue also while building u-boot gives warning related to bl31.bin not present and u-boot.bin not present which is then later used in building final image "flash.bin"

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logan3c3
Contributor III

Here are the modifications i have done

added support in arch/arm/mach-imx/imx9/Kconfig

 

config TARGET_IMX93_11X11_EVK
        bool "imx93_11x11_evk"
        select OF_BOARD_FIXUP
        select IMX93

config TARGET_IMX93_CALIXTO_VERSA_256
        bool "imx93_calixto_versa"
        select OF_BOARD_FIXUP
        select IMX93
config TARGET_IMX93_CALIXTO_VERSA_512
        bool "imx93_calixto_versa"
        select OF_BOARD_FIXUP
        select IMX93
config TARGET_IMX93_CALIXTO_VERSA_1024
        bool "imx93_calixto_versa"
        select OF_BOARD_FIXUP
        select IMX93
config TARGET_IMX93_CALIXTO_VERSA_2048
        bool "imx93_calixto_versa"
        select OF_BOARD_FIXUP
        select IMX93

 

 

 

Then i added a new vendor folder path to keep custom board related info.

inside it i modified the Kconfig, spl

 

if TARGET_IMX93_CALIXTO_VERSA_2048 || TARGET_IMX93_CALIXTO_VERSA_1024 || TARGET_IMX93_CALIXTO_VERSA_512 || TARGET_IMX93_CALIXTO_VERSA_256

config SYS_BOARD
    default "imx93_calixto_versa"

config SYS_VENDOR
    default "calixto"

config SYS_CONFIG_NAME
    default "imx93_calixto_versa"


choice
    prompt "Select DDR Type"
    default IMX93_EVK_LPDDR4 if TARGET_IMX93_CALIXTO_VERSA_2048 || TARGET_IMX93_CALIXTO_VERSA_1024 || TARGET_IMX93_CALIXTO_VERSA_512 || TARGET_IMX93_CALIXTO_VERSA_256
    help
        Select the type of DDR to be used.

config IMX93_EVK_LPDDR4X
    bool "Using LPDDR4X Timing and PMIC voltage"
    select IMX9_LPDDR4X
    help
      Select the LPDDR4X timing and 0.6V VDDQ

config IMX93_EVK_LPDDR4
    bool "Using LPDDR4 Timing and PMIC voltage"
    select IMX9_LPDDR4X
    help
      Select the LPDDR4 timing and 1.1V VDDQ

endchoice

endif

 

For SPL

 

extern struct dram_timing_info dram_timing_1866mts;
extern struct dram_timing_info lpddr4_2GiB_micron_timing;
void spl_dram_init(void)
{
        struct dram_timing_info *ptiming = &lpddr4_2GiB_micron_timing;

#if IS_ENABLED(CONFIG_IMX93_EVK_LPDDR4) && IS_ENABLED(CONFIG_TARGET_IMX93_CALIXTO_VERSA_2048)
        if (is_voltage_mode(VOLT_LOW_DRIVE))
                ptiming = &lpddr4_2GiB_micron_timing;
#elif IS_ENABLED(CONFIG_TARGET_IMX93_CALIXTO_VERSA_2048) && IS_ENABLED(CONFIG_IMX93_EVK_LPDDR4X)
                ptiming = &lpddr4x_2GB_versa_timing;
#elif IS_ENABLED(CONFIG_TARGET_IMX93_CALIXTO_VERSA_1024) && IS_ENABLED(CONFIG_IMX93_EVK_LPDDR4X)
                ptiming = &lpddr4x_1GB_versa_timing;
#elif IS_ENABLED(CONFIG_TARGET_IMX93_CALIXTO_VERSA_512) && IS_ENABLED(CONFIG_IMX93_EVK_LPDDR4X)
                ptiming = &lpddr4x_512MB_versa_timing;
#elif IS_ENABLED(CONFIG_TARGET_IMX93_CALIXTO_VERSA_256) && IS_ENABLED(CONFIG_IMX93_EVK_LPDDR4X)
                ptiming = &lpddr4x_256MB_versa_timing;

#endif

        printf("DDR: %uMTS\n", ptiming->fsp_msg[0].drate);
        ddr_init(ptiming);
}

 


and i have copied include file to the custom board name, created dts and defconfig from the reference board.

Do i need to modify anything apart from this??

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Chavira
NXP TechSupport
NXP TechSupport

HI @logan3c3!

Have you updated your config for each ddr size?

The config file for iMX93 EVK is this file

Also you have to update the OPTEE OS configurations too if is used in this file

 

Try updating those files according each model that you want to use it.

 

We have a similar configuration for LPDDR4 and DDR4 models in iMX8MP EVK you can take as a reference for your implementation that configuration file

 

Best Regards!

Chavira

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logan3c3
Contributor III

Hello @Chavira ,
Currently i am trying to build only for 2048 so its configured for 2GB but is not being able flash per se . I have not modified for rest of the memory configuration as i am not building those. I am not using OPTEE also. What might be the problem?

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Chavira
NXP TechSupport
NXP TechSupport

HI @logan3c3!

Have you download and include the files lpddr4_pmu_train_imem.bin and lpddr4_pmu_train_dmem.bin?

 

Can you share your patches (u-boot, SPL, ATF, etc) and timing files to try by my side?

Are you compiling with Yocto or Standalone?

 

I recommend to do that Standalone first.

 

Best Regards!

Chavira

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