IMX91 rmii in uboot

[Giedrius_Baliukonis]

We are trying to launch imx91 based device.

Seems the TSN mac does not output anything via TX lanes.

We have followed the instructions of AN14149 in setting up the clocks and etc.

changes to eqos pinctrl:

       pinctrl_eqos: eqosgrp {
               fsl,pins = <
                       MX91_PAD_ENET1_TD2__ENET_QOS_CLOCK_GENERATE_CLK         0x4000057e
                       MX91_PAD_ENET1_MDC__ENET1_MDC                           0x57e
                       MX91_PAD_ENET1_MDIO__ENET_QOS_MDIO                      0x57e
                       MX91_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0                  0x57e
                       MX91_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1                  0x57e
                       MX91_PAD_ENET1_RXC__ENET_QOS_RGMII_RXC                  0x5fe
                       MX91_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL            0x57e
                       MX91_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0                  0x57e
                       MX91_PAD_ENET1_TD1__ENET1_RGMII_TD1                     0x57e
                       MX91_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK  0x5fe
                       MX91_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL            0x57e
               >;
       };

eqos dts node:

&eqos {
       phy-handle = <&ethphy1>;
       //phy-mode = "rgmii-id";
       phy-mode = "rmii";
       pinctrl-0 = <&pinctrl_eqos>;
       pinctrl-1 = <&pinctrl_eqos_sleep>;
       pinctrl-names = "default", "sleep";
       status = "okay";

       mdio {
               compatible = "snps,dwmac-mdio";
               #address-cells = <1>;
               #size-cells = <0>;
               clock-frequency = <2500000>;

               ethphy1: ethernet-phy@1 {
                       reg = <1>;
                       //eee-broken-1000t;
                       reset-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
                       reset-assert-us = <10000>;
                       reset-deassert-us = <10000>;
               };
       };
};

The phy itself properly negotiates with the other side.

As we have checked RX also works fine, however the tx lanes are silent.

We are using lf-6.12.34-2.1.0

Mdio lanes seems to work fine as the init and phy register read and write works.

[Giedrius_Baliukonis · Accepted solution]

Found a solution

Seems that pinctrl MX91_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK has to be changed into MX91_PAD_ENET1_TXC__ENET_QOS_TX_ER