IMX8X LVDS show nothing

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

IMX8X LVDS show nothing

3,057件の閲覧回数
shalanyang
Contributor II

                                                             IMX8X LVDS 

Hi everyone,

    we have meter program use imx8x, we use two lvds output to the LCD, but the result is show nothing,my LCD and  lvds config as follow, Please help me check it why show nothing? TKS!

&gpio0 {
/*TFT_PWR_EN*/
lvds0_panel_pwr_en {
gpio-hog;
gpios = <11 0>;
output-high;
};
/*SOC_OFF_RDY*/
soc_off_rdy {
gpio-hog;
gpios = <27 0>;
output-high;
};
};


&gpio1 {
/*LCD_RST*/
lvds0_panel_reset {
gpio-hog;
gpios = <26 0>;
output-high;
};
/*LCD_STBYB*/
lvds0_panel_stbyb {
gpio-hog;
gpios = <28 0>;
output-high;
};
/*BL_PWM for temporory*/
lvds0_panel_pwm {
gpio-hog;
gpios = <27 0>;
output-high;
};

/* peripheral 3.3v power on*/
peri_3v3_sw {
gpio-hog;
gpios = <13 0>;
output-high;
status="okay";
};

/* peripheral 1.8v power on*/
peri_1v8_sw {
gpio-hog;
gpios = <14 0>;
output-high;
status="okay";
};
};

pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp {
fsl,pins = <
SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020
SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020
>;
};

pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp {
fsl,pins = <
SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020
SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020
>;
};


&ldb1_phy {
status = "okay";
};

&ldb1 {
/*SC_P_USDHC1_WP_LSIO_GPIO4_IO21 0x06000021*/
/*wp-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;*/
/*enable-active-high;*/
/*split-mode;*/
split-mode;
status = "okay";

lvds-channel@0 {
fsl,data-mapping = "spwg";/*jeida*/
fsl,data-width = <24>;
split-mode;
primary;
status = "okay";

display-timings {
native-mode = <&t_lcd>;
t_lcd: t_lcd_default {
clock-frequency = <92729970>;
hactive = <1920>;
vactive = <720>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <10>;
vfront-porch = <3>;
hsync-len = <40>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
lvds-channel@1 {
fsl,data-mapping = "spwg";/*jeida*/
fsl,data-width = <24>;
split-mode;
primary;
status = "okay";

display-timings {
native-mode = <&t_lcd1>;
t_lcd1: t_lcd_default {
clock-frequency = <92729970>;
hactive = <1920>;
vactive = <720>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <10>;
vfront-porch = <3>;
hsync-len = <40>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};

ラベル(1)
0 件の賞賛
返信
7 返答(返信)

2,309件の閲覧回数
baijinlong
Contributor III

hi, is it convenient to send me a copy of this patch package?

0 件の賞賛
返信

2,309件の閲覧回数
zhetomg
Contributor I

hi, is it convenient to send me a copy of this patch package?

0 件の賞賛
返信

2,309件の閲覧回数
shalanyang
Contributor II

TKS ,we had solve it, NXP had give us pacth

0 件の賞賛
返信

2,309件の閲覧回数
zhetomg
Contributor I

??

0 件の賞賛
返信

2,309件の閲覧回数
zhetomg
Contributor I

Yang, is it convenient to send me a copy of this patch package? I also want to test my LVDS screen,E-mail: 1661986565@qq.com, thank you!

0 件の賞賛
返信

2,309件の閲覧回数
shalanyang
Contributor II

001.jpg002.jpg003.jpgI config the dts file as follow,can show the logo,but some time show two logs,the show picture see the attach 

&ldb1_phy {
status = "okay";
};

&ldb1 {
/*SC_P_USDHC1_WP_LSIO_GPIO4_IO21 0x06000021*/
/*wp-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;*/
/*enable-active-high;*/

/*fsl,dual-channel;*/
status = "okay";

lvds-channel@0 {
fsl,data-mapping = "spwg";/*jeida*/
fsl,data-width = <24>;
split-mode;
status = "okay";

display-timings {
native-mode = <&t_lcd>;
t_lcd: t_lcd_default {
clock-frequency = <92729970>;
hactive = <1920>;
vactive = <720>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <10>;
vfront-porch = <3>;
hsync-len = <40>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};

&ldb2_phy {
status = "okay";
};

&ldb2 {
/*SC_P_USDHC1_WP_LSIO_GPIO4_IO21 0x06000021*/
/*wp-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;*/
/*enable-active-high;*/

/*fsl,dual-channel;*/
status = "okay";

lvds-channel@0 {
fsl,data-mapping = "spwg";/*jeida*/
fsl,data-width = <24>;
split-mode;
status = "okay";

display-timings {
native-mode = <&t_lcd1>;
t_lcd1: t_lcd_default {
clock-frequency = <92729970>;
hactive = <1920>;
vactive = <720>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <10>;
vfront-porch = <3>;
hsync-len = <40>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};

0 件の賞賛
返信

2,309件の閲覧回数
joanxie
NXP TechSupport
NXP TechSupport

pastedImage_1.png

The mapping is as follows -
DC0-0 -> MIPI-DSI0 / HDMI / ISI loopback
DC0-1 -> LVDS0 / HDMI
DC1-0 -> MIPI-DSI1
DC1-1 -> LVDS1 / ISI loopback

pls check if you connect correctly and  you use split mode for the dual lvds? did you enable dual channel for the picture?

0 件の賞賛
返信