IMX8QM EVK Booting Bootloader with SD card resetting CPU continuously

[hiteshviradiya]

Dear All,

We are exploring IMX8QM EVK to use in our future product. To get start with it we had purchased IMX8QM EVK.

As a BSP Engineer, I am building Bootloader and preparing SD card to boot with it.

I am following instructions given in "i.MX Linux® User's Guide" section 4.5.13 How to build imx-boot image by using imx-mkimage" for which I managed from here and there all required binaries (ATF, U-boot (u-boot-spl.bin, u-boot-nodtb.bin and fsl-imx8mq-evk.dtb), HDMI and DDR firmwares) mentioned in this section and generated Bootloader flash.bin file

I copied it to SD card using "sudo dd if=flash.bin of=/dev/sdc bs=1k seek=33 conv=fsync" and set bootmodes (using SW801 and SW802) correctly. It has booted from it but it looks like it failed to load 2nd stage bootloader. See below detailed log:

U-Boot SPL 2017.03 (Oct 29 2018 - 18:24:55)
PMIC:  PFUZE100 ID=0x10
start to config phy: p0=3200mts, p1=667mts with 1D2D training
check ddr4_pmu_train_imem code
check ddr4_pmu_train_imem code pass
check ddr4_pmu_train_dmem code
check ddr4_pmu_train_dmem code pass
config to do 3200 1d training.
Training PASS
check ddr4_pmu_train_imem code
check ddr4_pmu_train_imem code pass
check ddr4_pmu_train_dmem code
check ddr4_pmu_train_dmem code pass
config to do 3200 2d training.
Training PASS
check ddr4_pmu_train_imem code
check ddr4_pmu_train_imem code pass
check ddr4_pmu_train_dmem code
check ddr4_pmu_train_dmem code pass
pstate=1: set dfi clk done done
Training PASS
Load 201711 PIE
Normal Boot
Trying to boot from MMC2
"Synchronous Abort" handler, esr 0x02000000
ELR:     80004364
LR:      910020
x0 : 0000000000915180 x1 : 000000004100d030
x2 : 0000000080004364 x3 : 00000000ff00fff0
x4 : 00000000009151a0 x5 : 00000000009151c0
x6 : 00000000401ffd7f x7 : 0000000000000003
x8 : 000000000000028c x9 : 0000000000000001
x10: 0000000000185bac x11: 00000000401ffa40
x12: 0000000000000259 x13: 000000000000024c
x14: 0000000000185bec x15: 00000000401ffa40
x16: 0000000000008558 x17: 000000000000000c
x18: 0000000000185e40 x19: 0000000000910020
x20: 00000000007f2a88 x21: 0000000000000000
x22: 00000000007f06c3 x23: 0000000000185df0
x24: 00000000007f06ab x25: 00000000007f2000
x26: 00000000deadbeef x27: 0000000000000000
x28: 0000000000000000 x29: 0000000000185d80

Resetting CPU ...

But if I use "imx-boot-imx8mqevk-sd.bin-flash_evk" file present inside L4.9.88_2.0.0_images_MX8MQ.tar.gz it boots up very well.

My Question: What am I missing to generated Bootloader which works like pre-built binaries?

Also I observed that section 4.5.13 mentioned to copy bl31.bin file to imx-mkimage git repo tool but there is no rule to use it in file iMX8M/soc.mak which is called when running "make SOC=iMX8M flash_hdmi_spl_uboot" command.

--

Thanks,

Hitesh

[hiteshviradiya]

This thread is closed ! All the problems resolved including building ATF firmware from source code. The mistake I was doing was "make PLAT=imx8qm bl31" but my EVK is having imx8mq pltform. Very confusing names imx8qm v/s imx8mq

So after building ATF using "make PLAT=imx8mq bl31" and putting it to generate Bootloader resolves the issue!!

[Bio_TICFSL]

Hi Histesh

The reason may be ddr errors so one can run ddr test and rebuild image using

guidelines in Chapter 4 How to bring up a new MX8M board MX8M_DDR_Tool_User_Guide.docx

included in package

i.MX 8M DDR Tool Release 

[hiteshviradiya]

This is resolved by replacing ATF (ARM Trusted Firmware) binary bl31.bin from https://community.nxp.com/servlet/JiveServlet/download/340179-27-427786/bl31.bin.zip  instead of generating from repo code.

Any idea what I might be missing in generation of ATF firmware from code?

BTW, I have already applied https://community.nxp.com/servlet/JiveServlet/download/340179-27-428410/0001-ATF-support-to-differen... patch

--

Thanks,

Hitesh

[hiteshviradiya]

I think it is not DDR issue because if I fill bootloader with all 4 DDR firmware bins (lpddr4_pmu_train_*.bin), It passes all the DDR tests and looks for 2nd stage Bootloader. And if I generate flash.bin w/o it, It stuck at DDR test stage boot up.

So 1st stage bootloader generation process is all good (which includes padding of 4 DDR firmware files & concatenating with u-boot-spl.bin)

But SPL fails to find 2nd stage Bootloader (which is u-boot.itb generated by means of mkimage_fit_atf.sh script which internally uses u-boot-nodtb.bin, fsl-imx8mq-evk.dtb and ATF bl31.bin).

So either u-boot.itb generation issue or offset which 1st stage bootloader looks for 2nd stage bootloader issue.

Please provide valuable inputs.

--

Thanks,

Hitesh

[hiteshviradiya]

Thank you dear for the prompt response!

I will check this but My question is: I am trying this with EVK so doesn't the DDR firmware binaries which is available on NXP are correct (which I used to generate flash.bin)?

I will try your suggested link and revert,

--

Thanks,

Hitesh