IMX8MQ SPI SDMA

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IMX8MQ SPI SDMA

1,031 Views
Venkat21
Contributor I

SPI communication does not work after an hour of communication start. I wrote a Kernel module with the below dts configurations. I faced two issues, it was not working for the spi max speed beyond 22 Mhz. and the other issue is a byte shift observed in rx side after an hour. no error reported from  ret = spi_sync(mvspi, &m); Also when I tried with user space SPI driver, I didn't get it up and running beyond 20Mhz. I believe upto 50Mhz it should not be an issue for spi communication for both the spidev implementation and the KO module with SDMA support. Please support in resolving the above two issues. SPIDEV to run at 40MHz, KO module to run at 40MHz and should not result in byte shifts after a period of communication. 

DTS Configurations made:

pinctrl_ecspi1: ecspi1grp {

fsl,pins = <

MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19

MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x19

MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x19

MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x19

>;

};

 

&ecspi1 {

fsl,spi-num-chipselects = < 1 >;

cs-gpios = <&gpio5 9 0 > ;

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_ecspi1 >;

status = "okay";

#address-cells=<1>;

#size-cells=<0>;

};

 

ecspi1: ecspi@30820000 {

#address-cells = <1>;

#size-cells = <0>;

compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";

reg = <0x0 0x30820000 0x0 0x10000>;

interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,

<&clk IMX8MQ_CLK_ECSPI1_ROOT>;

clock-names = "ipg", "per";

dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;

dma-names = "rx", "tx";

status = "disabled";

};

 

 

 

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943 Views
art
NXP Employee
NXP Employee

The Table 39 of the i.MX8M Data Sheet document specifies the minimum ECSPI SCLK
cycle time for read operations as 43ns, that results in maximum SCLK frequency of
about 23MHz. At higher SCLK frequencies, correct read operation is not guaranteed.

Best Regards,
Artur

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1,016 Views
Venkat21
Contributor I

Hi Christian,

Thanks, there were no spi related errors/debug info observed from dmesg log for both spi-imx and sdma drivers.

Below is the extract from dmesg log,

[ 5.686705] imx-sdma 30bd0000.sdma: no iram assigned, using external mem
[ 5.716527] spi_imx 30820000.ecspi: probed
[ 5.728837] imx-sdma 30bd0000.sdma: loaded firmware 4.4
[ 5.763281] imx-sdma 302c0000.sdma: no iram assigned, using external mem
[ 5.791360] imx-sdma 302c0000.sdma: loaded firmware 4.4

Other than the above lines no other debug info present for spi-imx or sdma.

Thanks, Venkat.

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1,003 Views
ceggers
Contributor V

Hi Venkat,

[ 5.686705] imx-sdma 30bd0000.sdma: no iram assigned, using external mem
[ 5.716527] spi_imx 30820000.ecspi: probed
[ 5.728837] imx-sdma 30bd0000.sdma: loaded firmware 4.4
[ 5.763281] imx-sdma 302c0000.sdma: no iram assigned, using external mem
[ 5.791360] imx-sdma 302c0000.sdma: loaded firmware 4.4

SDMA Firmware:
The SDMA firmware version is not the latest. But related to SPI, there are no changes in newer firmware versions...

The SDMA driver in the vanilla and NXP kernels load their firmware asynchronously. Take core not to use the SPI peripheral until SDMA firmware loading has actually finished.

SPI Timings:

https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQIEC.pdf

Page 41, 3.9.1.1 ECSPI Master mode timing:

CSPIx_SCLK Cycle Time–Read,min = 43ns (23.25 MHz)

For me, this is surprisingly slow. Controllers from other brands are able to perform SPI communication with up to 100 MHz...

regards,
Christian

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997 Views
Venkat21
Contributor I

Hi Christian,

Thanks. SPI peripherals are opened only after the bootup initialization of sdma firmware upload.

Venkat

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1,024 Views
ceggers
Contributor V

Are there any SPI related error messages in the kernel log? Please check with the "dmesg" command.

Thanks,
Christian

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